Date: June 21, 2016 at 1 PM ET
Free to attend
Length: Approximately one hour
Process technology has a symbiotic relationship with hyperconverged infrastructure in datacenters, as each is both enabled and driven by the other. Exponentially increasing data volumes of data centers require huge memory bandwidth and high-speed interconnectivity between servers, storage, and switches, in turn defining and requiring chips with leading-edge process technology.
High-performance SoCs with FinFET transistors are a key enabler for hyperonvergence, helping deliver three key benefits: high performance and bandwidth, high density, and lower power consumption. FinFETs are estimated to be up to 37% faster while using less than half the dynamic power and cutting static leakage current by as much as 90%. FinFETs also promise to alleviate problematic performance versus power tradeoffs, enabling design teams to balance throughput, performance and power to match the needs of each application.
GLOBALFOUNDRIES 14-nanometer FinFET process technology delivers power, performance and area benefits for a broad array of applications from high-end mobile devices to hyperconverged infrastructure.
Sanjay Charagulla is Senior Director of Segment Marketing and Business Development for Communications and Datacenter solutions at GLOBALFOUNDRIES. Sanjay is responsible for driving thought leadership, product management and new market opportunities.
Sanjay has more than 20 years of experience in the semiconductor and networking industry with a focus on architecture, development, marketing, strategy, and business development. Previously, Sanjay worked on ASIC design and development for LSI Logic Transceivers, Network Processors and Line card solutions for Vitesse Semiconductor, and Altera Corporation as FPGA systems architect and product management functions.
Most recently Sanjay worked at Xilinx as Sr. Director, Wired and Datacenter Business Unit, where he led several functions including Product Definition, Corporate Strategy, Product Marketing, and Business Development.
Sanjay holds several key patents in high speed I/O and FPGA technologies. He has represented and influenced several standard body committees and technologies that include JEDEC, IEEE802.3, OIF, Interlaken, ONF, ITU, PCISIG, and HT.
Sanjay holds a BS in ECE from Nagarjuna University, in India and a MS in Electrical Engineering from Oklahoma State University, Stillwater, OK. He completed the Executive MBA program from the Stanford School of Business, CA.
Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. For his many technical contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm and 16/14 nm product developments. Currently Ravi is Director of Product Management at GLOBALFOUNDRIES. He is a Distinguish Lecturer for IEEE Electron Devices Society and serves as Editor for IEEE Transactions on Electron Devices. Ravi had authored or co-authored over 50 publications, has over 10 issued US patents and over 25 pending disclosures.
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