Mobile Semiconductor introduces 40nm ULP memory compiler support

Mobile Semiconductor today announced the introduction of its three new 40nm ULP memory compilers which are available immediately.  The 40nm ULP compilers allow the engineer to create memory designs that maximize battery life while occupying the smallest amount of expensive silicon real estate. Mobile Semiconductor’s silicon-proven embedded memory technology offers these compilers on Taiwan Semiconductor’s 40nm ULP process.

These solutions are available in a range of formats that include:

  • Single Port, High Speed, Ultra Low Power
  • Single Port, Low Voltage (dual supply), Ultra Low Power
  • Single Port, High Speed, Ultra Low Power with a Reduced Mask Set

Founder and CEO Cameron Fisher states, “Mobile Semiconductor is one of the leaders in providing low power solutions.  The new 40nm ULP with flash allows the engineers to build products that may, for example, need periodic security updates and/or benefit from field updates to improve functionality.  Having on-board flash also serves to reduce the chip count on a board which is a further saving.  We support the process version with or without embedded Flash in any variant.”

The ULP process can lower power consumption by up to 30% while at the same time cutting leakage current by as much as 70%.  Overall performance is improved at virtually no cost to the customer.  Further, the high density 0.242 um2bit cell allows for reduced geometries, further reducing costs.

“The 40nm process technology has been around for a few years but the addition of Flash makes it applicable to a wider range of devices”, Fisher continued, “and the price points we are offering our 40nm ULP compilers sets Mobile Semiconductor apart from other memory compiler solutions. We are confident that our new 40nm ULP compliers are the perfect choice for wide range of new designs in the high-performance battery powered products market space.”


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