Executives debate innovation drivers and cost reduction in microelectronics supply chain

By SEMI contributors

The closing Executive Panel discussion at the SEMI Industry Strategy Symposium on January 15 provoked diverse views on the drivers and future of innovation in the microelectronics manufacturing supply chain.  While technology demand and manufacturing efficiency provide the motivation for continued innovation in the minds of some, others believe the supply chain is forfeiting its value proposition and places too much emphasis on cost reduction.

ISS-exec-panel-photo1In a wide-ranging discussion moderated by VLSI Research chairman Dan Hutcheson, the arguments and examples of these perspectives spanned the topics of new device architectures, lithography, and the 450mm wafer transition.

John Chen, Ph.D., vice president of technology and foundry operations at Nvidia Corporation, said that affordability is key due to price sensitivities in the consumer market place.  People want electronic gadgets with great features and a good interface between them; however, the vast majority of users are young individual users and price is very important.

Chen said that if the industry truly collaborates together early-on, it can have early engagement in concurrent engineering and eliminate waste and redundancy. This reduces total cost and increases profitability for all.

Chen said that he doesn’t believe in “squeezing the vendors”; however, there is still waste in the supply loop.  Chen prefers think in terms of a supply “loop,” in which the participants have to work together rather than a supply “chain,” which connotes a more one dimensional linear relationship.

Chen said, “It’s difficult to “out-smart” others in the supply loop because all the participants have great capabilities and the only solution is to increase the pie and share the rewards.”

He asserts that this kind of coordination is essential given greater complexity from challenging technology requirements and an increasing rate of change. As an example, he speculated that the industry faces three significant discontinuities as it adopts manufacturing technology for 20nm semiconductor devices.

First, is a good discontinuity — the introduction of 3D transistors or finfets. These new device structures reduce power requirements and greatly enable consumer products with longer battery life by providing better control of the gate and reducing leakage current. Chen said that without these kinds of design innovations and the accompanying manufacturing process technology, we cannot have a quantum jump in performance.

The second discontinuity accompanies the end of 193 lithography — the point at which multiple patterning is required. At 20nm, the number of masking steps has increased 15-20 percent. Chen characterizes multiple patterning, “as a brute dumb force.” It causes wafer costs to increase and yields to suffer. Both of these results contribute to a negative discontinuity in die cost.

Read more: Is the chip industry as important as we think? Depends on whom you ask

The third discontinuity is the wafer size. Chen argues that we are already in need of 450mm wafers.  He noted that every time the industry has migrated to a larger size wafer, additional innovation comes with the transition. Accordingly, he expects additional innovation to accompany 450mm technology development.

Mike Splinter, executive chairman of Applied Materials, offered an optimistic perspective on the semiconductor demand to be created by “the internet of things” and pervasive computing — labels for the massively interconnected sensing and computing capabilities, which he expects to help address complex business, healthcare and education issues that face society.

The sub-trends influencing pervasive computing are mobility and analysis of huge amounts of information from personal devices that will be available anywhere and anytime producing a gigantic amount of data.  Because of this rapid expansion, he believes that we are underestimating the need for bandwidth and memory. He contrasted the adoption rate of other products as a way to make the point that we face unprecedented demand acceleration.  He said that television took 40 years to acquire 50 million users; Facebook took a couple years; and now an app can have 50 million users in a few weeks.  Because of this data centers will grow at an increasing rate and we will need greater performance.  Outside the data center we need lower power and cost reductions.

The highest value technologies will increase performance, reduce power, and lower cost; and that is how he believes the industry should measure what we do and prioritize R&D resources.

Read more: New methods to reduce time and cost of R&D

Splinter was confident that the industry would continue to drive smaller dimensions down to 5nm. Splinter said the lithography is now essentially a “cost play.” Scaling is no longer the enabling play, it’s a cost play because there are alternatives such as precision material engineering.

Splinter said, “We haven’t seen this kind of demand for innovation since the 1970’s when the industry saw the emergence of non-volatile memory, DRAM and the shift away from aluminum and to silicon for logic gates.  That’s the environment we are in today.  There have been tremendous advancements in flash memory, but we need a new DRAM as well as 3D technology in logic devices.”

Equipment companies have become very efficient through productivity improvements, engineering, consolidation and offshoring.  He believes the industry is reaching the limits of how much more efficiency can be attained without significant R&D trade-offs. Investments in innovation should be evaluated on the criteria of power, performance and cost.

Regarding 450mm, Splinter said that the technology changes under consideration for the large wafer size can much more easily be achieved at 300mm if the industry concentrates its R&D dollars there.  Furthermore, he is concerned about the posture of memory makers because most of the wafers processed are for memory products and if memory makers don’t participate in 450mm we won’t see the volumes necessary to support the larger wafer area.

“Where there is a demand for innovation, innovation will happen.  I am excited about next 10-15 years. The only limitation we may have is assuring that we have the young people coming into the industry.”

In response to a question by panel moderator Dan Hutcheson, Mike Splinter rebutted an assertion earlier in the conference that consolidation and large mergers were creating mega-suppliers that are too big to fail, but also too big to innovate. Splinter expressed enormous optimism about the prospects of sparking innovation when the engineers from TEL and Applied Materials are allowed to get together and share diverse but complimentary capabilities.  He pointed to beneficial collaboration that occurred when Applied Materials acquired Varian and believes that, when combined with TEL, the new organization will be able to leverage real collaboration and focus more R&D dollars on innovative technology.

According to Kazuo Ushida, executive vice president and president of Precision Equipment Company for Nikon, lithography has long supported Moore’s Law in lowering the cost per transistor. However, it is reaching the limits of what can be achieved with wavelength reduction and numerical aperture enlargement.  EUVL has numerous and costly challenges, and therefore Nikon believes that it is necessary to migrate to a larger wafer size.  During the transition from 200-300mm, there was a quadrupling in in the optical lithographic performance improvement.

Ushida said that Nikon is willing to take a long view on the return on investment to support customers.  He compared the situation to Boeing’s investment in developing the 787 which will have approximately 20 year payback.

He said that throughput of 150 wafers per hour will be needed to be competitive with 300mm and that industry synchronization is essential to lower the time to recouping the cost of development.

Terry Brewer, Ph.D., president and founder of Brewer Science, bemoaned the persistent emphasis on cost reduction that is pervasive in industry dialog.  He fears the industry is drifting away from true innovation as a driver of technology. Picking up on an earlier topic about the industry’s need to recruit future talent, Brewer said that it will be hard for young technologists to be excited about manufacturing innovation because there is too much focus on cost.

Brewer cautioned that the manufacturing supply chain will decline in value if it positions costs reduction as the primary benefit of innovation. Brewer said, “At one time, Moore’s law was very valuable because chips were the main value proposition in electronics.  Sadly, it is not today.”  He suggested that semiconductor manufacturing is being supplanted as the “mainstream” value creator by companies like Apple and Google.

Brewer contrasted the industry mindset to that of Apple’s saying that, “Steve Jobs came out with an $800 phone when everyone else was trying to reduce cost.  Apple won because it had a better value proposition.”

Brewer suggested that the industry roadmap for the 450mm transition, EUV lithography will slow or be pushed out because of costs.  In contrast, the last two nodes were driven primarily out of chemical engineering and materials innovations.

The panel concluded with a consensus that innovation and collaboration are tightly related activities and that value-driven innovation is required to sustain the industry in a consolidating supply chain environment.

SEMI ISS-Europe is February 23-25. For information on all SEMI events, visit: www.semi.org/en/Events.


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

One thought on “Executives debate innovation drivers and cost reduction in microelectronics supply chain

  1. Bill Kohnen

    Dr. Brewers observation that “semiconductor manufacturing is being supplanted as the “mainstream” value creator by companies like Apple and Google” helps make sense many of the concerns over attracting people to work in the industry, focus on cost over innovation, and perhaps even the premise of the discussion semiconductor supply chain.

    Seem s like they are saying that the Semi industry will be just another supplier to Apple and Google and not really innovative or massively profitable on its own anymore.

    Probably all ready is the case - can you imagine Apple or Google accepting an “Intel Inside” logo on their product and it has been a long time since regular folk got rich on stock at a semi company.

    Even if that is the reality I would have expected more from these industry leaders on vision and optimism. Across the board the current generation of semi industry leaders seems to be getting a bit stale.


Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>


Extremely accurate conductive measurement technology at nanoscale resolution for failure analysis
03/04/2014Park Systems, a manufacturer of Atomic Force Microscopy systems since 1997 announced PinPoint Conductiv...
Digitally controlled lab unit for small sample material processing
02/07/2014Microfluidics International Corporation introduces the new LM10 Microfluidizer, a digitally controlled lab unit for small sample mater...
First surfactant-free semiconducting carbon nanotube inks
02/03/2014Brewer Science today launched inks with the potential to change the way carbon nanotube (CNT) users manufacture microelectronic devices. ...