Flip chip, wafer-level packaging see double-digit CAGR, says TechSearch International - Advanced Packaging
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Flip chip, wafer-level packaging see double-digit CAGR, says TechSearch International

(December 15, 2010) -- The adoption of flip chip and wafer level packaging (WLP) continues to expand to a wide range of devices. TechSearch International’s new study, "2010 Flip Chip and WLP: Market Projections and New Developments," projects a compound annual growth rate (CAGR) of more than 15% for flip chip units. In unit volumes, WLPs are expected to see a 12.48% CAGR from 2009 to 2014. The report profiles drivers for the demand for gold and solder bumping, as well as wafer level packaging.

The drivers for flip chip continue to be performance, on-chip power distribution, pad-limited designs, and form factor requirements. The use of FCIP is expanding for microprocessors, ASICs, field programmable gate arrays (FPGAs), DSPs, media devices, chipsets, and graphics chips. Driven by form factor, many wireless products are adopting flip chip interconnect. Solder bumped devices are found in applications such as automotive electronics, computers and peripherals, telecommunications, and consumer products. Strong growth is projected for copper (Cu) pillar and 300mm wafer bumping.

The growth in WLPs is driven by increased demand for thinner, lighter-weight portable products; WLPs are adopted for form factor, performance, and cost reduction reasons. The industry has seen an increase in shipments of analog devices such as power amplifiers, audio CODEC, integrated power management controllers, and ring tones for mobile phones, MOSFETs, image sensors, wireless, and integrated passive devices (IPDs). WLPs have historically been used for low-pin-count (≤100 I/O) applications, but many companies plan to use WLPs for higher-pin-count applications with larger die sizes (7 x 7mm or larger). An increasing number of companies are interested in fan-out WLPs (FOWLP). A variety of package offerings are appearing on the market. Fan-out WLPs are a package option for devices with a large number of I/Os that cannot be accommodated by a fan-in design. The use of a fan-out solution provides the same low-profile advantage as the conventional WLP.

The 200-page TechSearch International report provides an updated forecast for the flip chip wafer bumping market by product application, device type, FCIP/FCOB split, number of wafers, and number of die. Also included in this report are projected demand and capacity (merchant and captive) by the number of wafers and bump type. Geographic changes in the location of bumping supply are analyzed. WLP demand is projected in number of die, number of wafers and device type. Capacity is stated in wafers. Bumping, wafer level packaging, and contract assembly service providers are highlighted in terms of capability and experience. Contacts for these companies as well as suppliers of laminate substrates, bonding equipment, and inspection systems are provided.

TechSearch International, Inc. is a market research firm specializing in technology trends, microelectronics packaging, and assembly. Learn more at http://www.techsearchinc.com

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