San Jose, CA USA
F or a number of years, there has been growing awareness of the importance of new materials in contributing to ongoing progress along the Moore's Law curve. Today, we're seeing not only the first-order effects of this, like high-k/metal gates (HKMG), but also the need for entirely new process chemistries that can clean, etch, and planarize those new materials without negatively impacting device performance.
Among the most novel change at 22nm is the anticipated introduction of the first FinFET-based products into high-volume production by a major logic manufacturer. Other IC manufacturers will employ evolutionary third-generation HKMG transistors. Advanced logic manufacturers will address memory latency issues – particularly for multi-core products – with embedded memory architectures and/or innovative system-in-package (SIP) approaches.
All of these performance-enhancing new materials are creating a ripple effect that compounds the usual integration challenges faced at a new technology node. The increasing need for new materials and device architectures is not slowing at the 22nm node, nor is the escalation of process and integration complexity. As more and more new materials come into play, the difficulty of developing and maintaining a broad process window increases.
Here are a few predictions for technology evolution, revolution and challenges at and beyond the 22nm node: 1) To improve threshold voltage (Vt) control and distribution, third-generation HKMG transistors will utilize optimized integration schemes with tailored chemical formulations for wet cleans and wet strip processes rather than today's conventional oxidizing and reducing chemistries; 2) First-generation FinFET devices will face parasitic capacitance and resistance issues. Improvements will come with second-generation multi-gate transistors, and high-mobility channel transistors will follow at the low 1x nm technology nodes; 3) Leading DRAM manufacturers targeting the growing high-performance mobile memory market will introduce disruptive capacitor technologies, enabling capacitance and leakage current (Jg) performance that is unattainable with today's capacitor materials systems; 4) High-speed, high-density e-DRAM and e-NVM technologies will be embedded in close proximity to the cores in advanced CPU and GPU products to address memory latency limitations; 5) Floating-gate NAND flash has already been proven to extend below the 2x nm node. More advanced non-volatile memory technologies will emerge in volume production over the next 2-3 years, enabling continued cost/bit scaling with improved program/erase windows and data retention that will ultimately displace NAND as we know it.
Given the unrelenting waves of innovation required to maintain competitiveness, along with constantly increasing device complexity, development cost and risk, we see increasing demand for more efficient, more effective approaches to semiconductor product R&D. The many competing and interacting considerations (compatibility, performance, cost, time to market, ease of integration into high-volume manufacturing, etc.) are simply overwhelming to traditional product development methodologies.
Moreover, the nodes that follow 22nm will be the most technically and economically challenging the semiconductor industry has ever experienced. Fundamental changes in lithography (EUV), transistor and memory architectures, interconnect technologies (including optical), logic-memory integration, and other significant transformations are before us. And each will bring with it an entirely new set of materials and supporting process chemistries that will need to be developed and shaken out, with timelines measured in weeks and months, not years.
The stakes are high – and it's clear that research, development and commercialization strategies must evolve at least as rapidly as semiconductor products have. We have entered into a new paradigm in the semiconductor industry in which new product innovation is being enabled by an advanced generation of highly productive R&D systems and methods.
David Lazovsky, CEO, Intermolecular, 3011 North First Street, San Jose, CA 95134 USA; ph.: 408-582-5700; email: [email protected]
Solid State Technology, Volume 54, Issue 7, July 2011