Zvi Or-Bach, MonolithIC 3D, describes the TSV-beating monolithic IC fab process, and argues for scaling "up" rather than down. Or-Bach compares the costs of further semiconductor scaling to advanced packaging.

Mechanical stresses can prevent successful implementation of 3D packaging technologies, says Larry Smith, SEMATECH. He argues for a DFM-like solution to identify and manage stress on thinned and stacked die in 3D ICs. To complicate matters, foundries, OSATs, and memory suppliers could inflict different stresses on the die, and the whole industry is too new at 3D packaging to present concrete answers.

Victor Moroz discusses the strong but doable effects of stress on TSVs. TSV stress ranges are comparable to the size of the TSV, and analog behaves differently than digital. Synopsys recently presented results (part of a collaboration with imec) at a SEMATECH event.

Weeks after announcing a 40nm 8GB DDR3 memory with 3D through-silicon vias (TSV), Samsung is showing a wide I/O 1GB DRAM also utilizing 3D TSVs, targeting mobile applications.

As gold becomes more expensive, copper wire bonding becomes more appealing for chip packaging. Reverse bonding, fine-pitch bonding, looping, second bonds, and other technologies are ramping on roadmaps, according to Kulicke & Soffa (K&S).

Tessera Technologies Inc. (Nasdaq:TSRA - News) began two corporate initiatives to expand its technologies in semiconductor microelectronics beyond packaging, and to potentially separate its Imaging & Optics business.

Freescale Semiconductor's Networking and Multimedia Group (NMG) placed a volume order for Verigy's V93000 scalable test platform to use in testing select QorIQ PowerPC communications microprocessors, based on Power Architecture technology.

SiliconBlue Technologies unveiled its mobileFPGA platform device roadmap using TSMC's 40nm low power standard CMOS process. The two distinct families target the two areas where smartphones and other handhelds differentiate.

Thin Film Electronics ASA (Thinfilm) and PARC, a Xerox company, entered the next phase of their co-innovation engagement for printed memory devices. This next phase extends the engagement to prototyping the product for manufacturing readiness.

Sigurd Microelectronics Corporation (Sigurd) will be the first adopter of Multitest's MT2168 pick-and-place test handler in volume production in Taiwan. The SATS provider will use it to test various QFN packages.