19. Atom-by-Atom Modeling of Grain Boundaries
Category: Noteworthy Papers on Diverse Topics
Paper 5.6 - Statistical Poly-Si grain boundary model with discrete charging defects and its 2D and 3D implementation for vertical 3D NAND channels; Robin Degraeve et al, Imec
Future flash memories may be stackable devices with polysilicon channels running vertically through them. However, defects in polysilicon’s crystal structure called grain boundaries decrease electrical conductivity by scattering and trapping electrons. A good understanding of the actual conduction paths in these channels would enable more accurate predictions of how the devices will operate. Existing computer models of these paths, though, are based on generalized assumptions about grain boundaries. An Imec team will present a new atomistic 3D model of grain boundaries that takes into account specific regions of enhanced scattering in the polysilicon, plus specific charge defects that can cause local barriers and depletion areas. The model gives statistical insight into the properties of scaled poly-Si channel devices (particularly vertical NAND devices), and their yield and reliability limitations.