By Jeff Dorsch, Contributing Editor
EUV and mask complexity were the hot topics at this year’s SPIE Photomask Technology conference in Monterey, Calif.
Extreme-ultraviolet lithography systems will be available to pattern critical layers of semiconductors at the 10-nanometer process node, and EUV will completely take over from 193nm immersion lithography equipment at 7nm, according to Martin van den Brink, president and chief technology officer of ASML Holding.
Giving the keynote presentation, Martin offered a lengthy update on his company’s progress with EUV technology.
Sources for the next-generation lithography systems are now able to produce 77 watts of power, and ASML is shooting for 81W by the end of 2014, Martin said.
The power figure is significant since it indicates how many wafers the litho system can process, a key milestone in EUV’s progress toward becoming a volume manufacturing technology. With an 80W power source, ASML’s EUV systems could turn out 800 wafers a day, he noted.
The goal is to get to 1,000 wafers per day. ASML has lately taken to specifying throughput rates in daily production, not wafers per hour, since many wafer fabs are running nearly all the time at present.
ASML’s overarching goal is providing “affordable scaling,” Martin asserted, through what he called “holistic lithography.” This involves both immersion litho scanners and EUV machines, he said.
Martin offered a product roadmap over the next four years, concluding with manufacturing of semiconductors with 7nm features in 2018.
The ASML president acknowledged that the development of EUV has been halting over the years, while asserting that his company has made “major progress” with EUV. He said the EUV program represented “a grinding project, going on for 10 years.”
For all of EUV’s complications and travails, “nothing is impossible,” Martin told a packed auditorium at the Monterey Conference Center. With many producers of photomasks in attendance at the conference, Martin promised, “We are not planning to make a significant change in mask infrastructure” for EUV. He added, “What you are investing today will be useful next year, and the year after that.”
SPIE panel tackles mask complexity
Photomasks that take two-and-a-half days to write. Mask data preparation that enters into Big Data territory. And what happens when extreme-ultraviolet lithography really, truly arrives?
These were among the issues addressed by eight panelists in a session “Mask Complexity: How to Solve the Issues?” The panelists were generally optimistic on prospects for resolving the various issues in question. Dong-Hoon Chung of Samsung Electronics said solutions to the thorny challenges in designing, preparing, and manufacturing masks were “not impossible.”
Bala Thumma of Synopsys said he was “going to take the optimistic view” regarding mask-making challenges.
“Scaling is going to continue,” he added.
“We are not at the breaking point yet,” Thumma said.
“Far from it!” Electronic design automation companies like Synopsys will continue to improve their software tools, he asserted. Mask manufacturers will also benefit from “strong partnerships” with vendors of semiconductor manufacturing equipment, and “strong support from semiconductor companies,” he said.
To resolve the issue of burgeoning data volumes in mask design and manufacture, Suichiro Ohara of Nippon Control System proposed the solution of a unified data format – specifically MALY and OASIS.MASK software. Shusuke Yoshitake of NuFlare Technology later said, “OASIS is gaining, but GDSII still predominates.”
Several panelists took the long-term view and looked beyond the coming era of EUV lithography to when multiple-beam mask writers and actinic inspection of masks will be required. EUV and actinic technology, it was generally agreed, will arrive at the 7-nanometer process node, possibly in 2017 or 2018.