The FD-SOI technology platform is perfectly suited for mobile IC applications where power consumption has to be very low to maximize battery lifetime. GIORGIO CESANA, STMicroelectronics, Crolles, France and CARLOS MAZURE, Soitec, Bernin, France
A broadband polarized reflectometry measurement, utilizing RCWA analysis, can be used to obtain detailed trench profile results. FRANZ HEIDER, Infineon Technologies, Villach, Austria; JEFF ROBERTS, JENNIE HUANG, JOHN LAM and RAHIM FOROUHI, n&k Technology, San Jose, CA
New approaches can help improve cycle time and achieve higher purity inter-process wafer environmental control. MICHAEL BRAIN, MAY SU, ANTHONY BONORA, and DANIEL BABBS, Brooks Automation, Chelmsford, MA
The process flows applied today for real product manufacturing are quite different from the process flows initially proposed for a universal 3D IC. THORSTEN MATTHIAS and PAUL LINDNER, EV Group, St. Florian, Austria
TechXPOT speakers highlight the challenges ahead on the road to 14nm. Debra Vogler, SEMI, San Jose, CA
At press time, inflection points have been top of mind, as we get ready for The ConFab. I've been reviewing all the presentations and looking forward to a fantastic event.
The International Symposium on Electronic Packaging was held in Osaka the week of April 10th with keynote speakers, Dr. Subramanian S. Iyer of IBM, Dr. Takeshi Uenoyama of Panasonic, and Dr. Urmi Ray of Qualcomm.
After a functional A-sample prototype is built, it doesn't take long for a project to gain traction that has market pull.
Random process variations and layout-dependent effects are a fact of life for designers working at the more advanced process nodes and become critical at 45nm. Besides random and systematic variation effects, reliability effects, such as bias-temperature-instability (BTI), also become prevalent, introducing another dimension of variations that impact parametric yield.
The Advanced Technology Investment Company (ATIC) and the Semiconductor Research Corporation (SRC) last month launched the ATIC-SRC Center of Excellence for Energy Efficient Electronic Systems (ACE4S), to be hosted jointly in Abu Dhabi by Khalifa University of Science, Technology and Research, and Masdar Institute of Science and Technology.
At the 50th Design Automation Conference (DAC) in Austin, Texas, GLOBALFOUNDRIES unveiled a comprehensive set of certified design flows to support its most advanced manufacturing processes.
For the first time ever, no clear winner has emerged to claim top honors in the MEMS business for 2012, with Bosch of Germany and French-Italian STMicroelectronics ending up evenly splitting the title of No. 1 supplier for the year, according to a MEMS Competitive Analysis Report from information and analytics provider IHS.
Fab equipment spending will grow two percent year-over-year (US$ 32.5 billion) for 2013 and about 23 to 27 percent in 2014 ($41 billion), according to the May edition of the SEMI World Fab Forecast.
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Intel Foundries MEMS for Fuel Cell Start-up Nectar
IFTLE 134 SEMI 3D European Summit – Is the Wide IO Driver Dead?
EUV source roadmaps: Physics vs Engineering
Intel details 22nm trigate SoC process at IEDM
IFTLE 128: RTI 3D ASIP Part 1; Lester the Lightbulb update
Questions and answers on FD-SOI
GlobalFoundries takes on Intel with 14nm finFET “eXtreme Mobility” process
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ROFIN presents turnkey solutions for FEOL applications
July 2, 2013
The new laser wafer processing system Waferlase 200/300/450, is a fully automated modular platform comprising a market-leading ...
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EV Group launches new LowTemp room temperature debonding platform
July 1, 2013
EV Group, a supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today i...
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All-in-one microscope for advanced imaging, recording and measurement
June 7, 2013
Building on its extensive microscope lineup, KEYENCE Corporation has released a new multipurpose microscope. |
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Olympus launches LEXT OLS4100 laser confocal microscope
June 7, 2013
New 3D measuring system offers auto brightness and high-speed stitching. |
Rapid Defect Indentification with Layout-Aware Diagnosis
Scan logic diagnosis is a powerful tool to help failure analysis engineers determine the root cause of a failing die. Yield engineers, on the other hand, are...
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Flip Chip Devices get Flat and Happy
Thin is definitely in, but what our modern flip chip devices really want is to be flat and happy! As flip chip die have become increasingly thinner in recent...
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Surface Cleaning and Preparation
This introduction requires the development of new critical and selective cleans tackling galvanic corrosion, pattern collapse both in FEOL and BEOL...
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450mm Status Report
Hear from the G450C General Manager, Paul Farrar Jr., on the current status of activities, key milestones and schedules, and imec’s senior business...
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