IEDM 2011: Hollow copper 3D TSVs

3D ICs with Cu through-silicon vias (TSV) are getting a lot of attention, but some issues relating to potential damage still have to be worked out — e.g., having Cu and Si in such close proximity can lead to physical stresses, and their fabrication processes can cause damage too. IBM researchers devised annular (hollow cylindrical) Cu TSVs to connect upper-level wires in a functional 32nm SOI 3D embedded memory module (128-Mb DRAM on top of a 96Mb DRAM, each using 0.039


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won’t automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>



New AFM with high definition electrical measurement capabilities
04/16/2015The Nano-Observer, designed by Concept Scientific Instruments, is ideal for current and future AFM research applications….
Thin wafer processing temporary bonding adhesive film for 3D wafer integration
03/24/2015 AI Technology, Inc (AIT) is the first known provider of a film format high temperature temporary bonding adhesive for thi…
Dramatic results achieved in cleaving glass using ultra-short pulsed lasers
03/11/2015ROFIN-SINAR, Inc. introduces the SmartCleave FI laser process and the MPS glass handling system for high speed and precise cl…