Insights From Leading Edge

IFTLE 233 Package Shrinkage Continues with ASE FOCLP

By Dr. Phil Garrou, Contributing Editor

The IMAPS Device Packaging Conference in Ft McDowell, AZ is an annual meeting where we have grown to expect major new technical introductions from the OSAT and materials community. This year’s meeting was no exception with key new package introductions from Amkor and ASE. This week we’ll look at the ASE FOCLP (fan out chips last package) and next week we’ll take a look at the new offerings from Amkor.


We’re all aware that miniaturization has driven our industry  for decades until we finally reached the WLCSP (wafer level chip size package) where the size of the package became the size of the chip. At this point we all looked at the vertical dimension and became focused on stacking chips (to gain x,y area) or thinning chips and package to produce thinner lap tops and or  cell phones.

John Hunt offered this interesting slide showing the thinning of the Apple I phone plotted against the increase in use of WLPs.

fig 1


As chips have been shrunk to the 22nm node and beyond there is not a lot of room under the chips for I/O, thus the focus on fan out WLP (FOWLP).  ASE addressed the question, “How do we reduce the cost structure in fan out packaging ?”

By moving to a totally laminate based solution they have been able to combine coreless laminate substrate, copper pillar bumping and molded underfill to produce a low cost ultra thin ( < 375um) package.

fig 2


  • Chip Last vs Chip First for Higher Assembly yields
  • Fine Pitch bumping direct on die pad without RDL
  • Thicker Copper (15-50µm)allows higher current
  • Thin Package < 375µm

The single layer coreless substrate utilizes embedded traces and pads for fine feature resolution.

fig 3


Fabrication is done on a 510mm x 410mm panel which is assembled in strip form similar to what is done for BGAs. No fan out wafer fab investment is required.

fig 4


FOCLP can be identical in size, thickness, foot print, trace layout and performance as FOWLP while using only lower cost  laminate packaging technologies. Electrical Simulation shows comparable performance.

fig 5


Multiple actives and passives can easily be included in FOCLPs using existing volume production equipment. Thermal Heat spreaders can be included in molded FOCLPs. Thick Copper can be used for high current and/or thermal transfer. Standard packages such as SiP and PoP will be transferrable to WLCLP.

For all the latest on 3DIC and advanced packaging, stay linked to IFTLE…


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