Insights From Leading Edge

IFTLE 324 Intel EMIB Implementation in the Stratix MX

By Dr. Phil Garrou, Contributing Editor

At the recent IEEE ISSCC in SF, Intel discussed the implementation of their EMIB technology [Embedded Multi-die Interconnect Bridge] technology in the Altera Stratix 10 FPGA family designed to meet the needs of developing high end communications systems.

EMIB was first proposed by Mahajan and Sane in USP 8,064,224 which was filed in 2008 and issued in 2011 [link].

A nice description of the technology was given at the 2016 ECTC [link]

EMIB uses thin pieces of silicon (< 75um) containing fine pitch interconnect (~2um L/S) embedded in an organic substrate to enable dense die to die interconnect between die on the BGA like laminate substrate as shown below.

X sect


Assembly is by a combination of 55 micron micro-bumps and 100+ micron FC bumps to support up to 24 transceiver channels with 96 I/Os each. They deliver 2 Gbits/second/pin at 1.2 pJ/bit/die using a proprietary protocol. Currently, the bridge links four 28 GHz serdes to the FPGA.

Intel has shown the following process sequence for EMIB:



Altera [now Intel’s Programmable Systems Group (PSG)] will have a family of their upcoming Stratix 10 line that will include HBM DRAM 3D stacks from SK Hynix connected to the FPGA with Intel’s proprietary EMIB technology. They report up to 10x the memory bandwidth available by connecting the FPGA to off-chip memory.

The HMB2 DRAM chips themselves are 8Gb each, and they can be stacked up to 8 high, yielding an 8GB 256GB/s lane. Combine four of these stacks for a 1TB/s aggregate memory bandwidth. Power consumption is reduced because the memory is right next to the FPGA and drive strength is much smaller.

Intel 1

The parts integrate four stacks of HBM2 DRAM, each with up to four memory dice. Each stack can run to 256Gbyte/s, so four stacks give 1Tbyte/s, and there are still transceivers and I/O available for use with external components.

memory solutions

One can conceive of application areas such as HPC (high performance computing), cloud computing and data centers. So far, Intel has announced no other users of this EMIB technology which they made available as a foundry service two years ago. It will also be interesting to watch how Intel’s EMIB competes with the other “fan-out “ solutions the industry is offering.

It is also interesting that these products use HBM instead of HMC (hybrid memory cube) memory stacks that Intel developed with Micron [link]

For the latest in advanced packaging, stay linked to IFTLE…


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