Defect removal using dry cryogenic aerosols


Jeffery W. Butterbaugh, FSI International, Chaska, MN

The high particle removal efficiency of cryogenic aerosol cleans can provide yield advantages in the BEOL after in-line testing, without altering substrate properties.

Measuring the electrical performance of transistors formed in FEOL processes has traditionally forced device manufacturers to choose between the lesser of two yield-reducing evils, either testing at first metal (in-line) and causing higher defectivity on tested wafers, or waiting to test only finished devices with the potential of filling the manufacturing line with out-of-spec product.

The in-line testing method creates particulate defects at the M1 layer and M2 layers that can significantly reduce die yield. During this process, the physical contact between the test probe tip and the contact pads of the circuit ??? usually a test structure located in the scribe lines between the die ??? creates a scrub mark and sheds contact pad material. Particles that migrate to the active circuitry can produce a short between metal lines or between subsequent metal layers. The defects generated can cause an entire wafer to be scrapped. As a result, a fab with 25,000 wafer starts per month will potentially sacrifice one wafer per lot, or 1,000 wafers per month, based on typical in-line sampling strategies.

Meanwhile, manufacturers that choose to delay electrical testing until after wafer processing completion, potentially put at risk 100 percent of work-in-progress (WIP) processed from M1 to final metal.

Because of the high WIP values driven by increasingly elaborate BEOL processing, manufacturers typically judge yield loss from in-line test to be more economically acceptable ??? even in the face of test-induced revenue losses that can reach hundreds of thousands of dollars per month.

These in-line test related losses, however, can be drastically reduced by integrating a dry cryogenic aerosol cleaning process after first or second metal in-line testing. This article discusses yield advantages gained by leveraging the high particle removal efficiency (PRE) of cryogenic aerosol inserted in the BEOL after in-line testing, without altering substrate properties [1-4].

High PRE and safety with exposed materials, fragile structures

IC manufacturers have successfully inserted cryogenic aerosol cleaning into the process flow at many nodes as a viable technique to safely remove particles from surfaces -- particularly as a replacement of conventional wet techniques. Unlike wet technology, dry cryogenic aerosol technology cleans substrates without concern for film etching, material changes, watermarks or electrical charging. Today, those yield-protecting characteristics, including the ability to collect valuable parametric data without sacrificing yield, [5] have helped establish post in-line test cleaning as the most frequently used application of cryogenic aerosol cleaning technology.

Maintaining product integrity throughout the manufacturing process is critical. BEOL features that contain copper, along with porous low k dielectrics easily altered by chemicals and water absorption, increase the difficulty in maintaining the integrity of substrate materials during cleaning, especially as feature sizes and low k values decrease.

Conventional water or chemical scrub processes are not compatible with many advanced materials and cannot be used to safely remove in-line testing debris. Wet chemical cleans can damage device performance through copper corrosion, low-k dielectric degradation from moisture absorption, insufficient drying in high aspect ratio features, and drying marks caused by mixed surface hydrophobicity.

All-dry, chemical-free cryogenic aerosol, by comparison, is well established as a yield-increasing cleaning methodology that can achieve high particle removal efficiency (PRE) without concern for structure damage, film etching, material changes, watermarks or electrical charging. The aerosol is safe to apply on any metal or dielectric exposed at the test level. By avoiding corrosion, etching, and altering surface charge properties, manufacturers can recover nearly all of the final yield loss associated with in-line testing. In addition, successfully eliminating yield penalties encourages early, expanded testing feedback that leads to improved data collection and tighter process control.

The cryogenic aerosol process: detach, diffuse and demove

The cryogenic aerosol is formed from inert argon and/or nitrogen gas that is cooled and partially liquefied as it passes through a liquid nitrogen dewar. The resulting liquid-and-gas mixture is delivered to the process chamber, which is held at reduced pressure. As the cryogenic gas/liquid mixture flows from a linear array nozzle positioned above the substrate, rapid expansion creates sub-micron droplets that freeze to form solid aerosol clusters.

The solid clusters impact the substrate, colliding with and dislodging particles through momentum transfer. Thermophoresis also assists in moving detached particles away from the surface. A high laminar flow of nitrogen across the surface sweeps particles (and aerosol clusters) away from the wafer. Defects entrained in the gas flow are removed from the chamber by a vacuum pump.

The aggressiveness of the cryogenic aerosol is controlled to optimize the cleaning process and balance particle removal efficiency with potential pattern damage. The intensity of the aerosol's energy and size is managed by varying the argon-to-nitrogen gas ratio, process chamber pressure, and the pressure (temperature) of the liquid nitrogen heat exchanger. As an example, lower chamber pressure results in smaller, higher velocity cryogenic aerosols. Smaller, faster cryogenic aerosols increase PRE, especially for particles down to 45nm in size.

Non-damaging particle removal protects yields

A study to evaluate cryogenic aerosol defect removal, across multiple BEOL processing steps, used 300mm bare Si wafers in a 65nm logic production line [1]. For all particle sizes measured, PRE with cryogenic aerosol cleaning was 99% or greater, with no material loss or substrate modification.

Figure 1. Typical clean efficiency data collected in FSI test lab. Cryogenic aerosol process proves effective for large & small particles.

The PRE values on a blanket test wafer are a critical metric and serve as a guide to estimate the final defect count on a device wafer after processing. Using these PRE values, the average remaining defect count is expected to be less than two for particles larger than 0.12??m. Figure 1 shows typical clean efficiency data for particles greater than 45nm collected in FSI test lab. Fab installations deploying post-probe cleaning to remove fall-on defects created by in-line testing may use conventional scrubber techniques to remove particles from the backside of the wafer. However, in many fabs wet treatment is minimized on the device side of the wafer following Cu CMP. In a 40nm production line example, replacing a scrub-clean sequence with cryogenic aerosol cleaning resulted in nearly a 60% improvement in defectivity, with no material loss or substrate modification.

Figure 2. Defect maps before cryogenic aerosol treatment indicating the types of defects that are easily removed.

Fourier Transform Infrared (FTIR) analysis detected no change in the porous low k dielectric film before or after exposure to cryogenic aerosol. This confirms the absence of moisture absorption that would degrade the dielectric constant. In addition, cryogenic cleaning reduced cost-of-ownership (CoO) by 30% compared to the process-of-record (POR).

Figure 3. Wafer maps show that the cryogenic process virtually eliminates probe yield loss. Wafers with no clean have more defects.(Red indicates failed die).

An additional manufacturer study [2] looked specifically at in-line testing at the first metal layer in a copper process. Debris-related defects were detected by electrical testing at the next metal layer.

Figure 4. Final yield of wafers that were 100% probed for reticle qual. Final yield improved by 19% for wafers that received the cryogenic aerosol treatment.

Fig. 2 shows a wafer map of defects before and after cleaning. Fig. 3 shows electrical test maps of wafers in the test lot. Red squares mark electrical defects on uncleaned wafers. Fig. 4 charts the functional yield improvements of approximately 19% that the manufacturer attributed to the cleaning process on two different lots that received 100% testing for reticle qualification.


The non-damaging, high particle removal efficiency of cryogenic aerosol cleaning is well-established across various IC process nodes as a critical factor in manufacturing yield recovery, especially as an alternative to water and chemical scrub technologies, which are incompatible with new materials. With a PRE performance validated against defects as small as 45nm, cryogenic aerosol cleaning is well-equipped to deliver 99% or better removal of the larger, probe-related defects associated with in-line electrical testing. In addition, by enabling engineers to return wafer yield previously sacrificed to gain valuable parametric data, cryogenic aerosol cleaning dramatically alters the cost-benefit calculation in favor of increased in-line testing.


1. Jeffrey M. Lauerhaas, Yav San Kok, Ameer Hamzah, and Ling Tze Tan, "Yield Improvement Using Cryogenic Aerosol for BEOL Defect Removal", ECS Transactions, 11 (2) 33-39 (2007) 10.1149/1.2779359 ?? The Electrochemical Society

2. Vivien Schroeder, "Val Parks, FSI ANTARES - AMD Evaluation", FSI European Knowledge Services??? Seminar Series 2006

3. J. W. Butterbaugh, Micro, 20, (2), 23 (2002)

4. B. K. Kirkpatrick, E. C. Williams, S. Lavangkul, and J. Butterbaugh, in Semiconductor Cleaning Technology 2001, J. Ruzyllo, T. Hattori, R. L. Opila, and R. E. Novak, Editors, PV 2001-26, p. 258, The Electromechanical Society Proceedings Series, Pennington, NJ (2001).

5. J. M. Lauerhaas, 2007 SEMATECH Surface Preparation and Cleaning Conference (2007).

Dr. Jeffery W. Butterbaugh is currently Chief Technologist and Director of Applications Engineering for FSI International. From 2003 to 2010, he served as co-chair of the FEP Technology Working Group for the ITRS.

Solid State Technology, Volume 55, Issue 3, April 2012

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