Molding Transforms to Meet Advanced Market Requirements


Integral to the packaging process for over three decades, epoxy molding compounds have undergone significant advancements due to revolutions in semiconductor package geometries, and legislative requirements surrounding lead-free and “green” material adoption. When molding compounds first appeared in the late 1960s, the industry welcomed the increased productivity and cost-performance balance these materials could provide over traditional metal or ceramic hermetic sealing methods.

Epoxy molding compounds serve to protect semiconductor devices from handling and assembly stresses of the outside world, and enhance the operational lifetime of the component. By providing environmental protection and mechanical strength, molding compounds have found application in the encapsulation of a variety of electronic packages including transistors, capacitors, conventional leaded packages such as small outline integrated circuits (SOICs) or thin quad flat sack (TQFPs); asymmetric packages such as ball grid arrays (BGAs), chip-scale packages (CSPs); and quad flat no-lead (QFN) packages; and emerging packages such as system-in-packages (SIPs), package-on-packages (POPs), and stacked-die packages. Molding compound formulations are generally developed for wide application across a given package type, and should be engineered with consideration for the processes through which the part will have to travel, the geometry of the device, and the intended end-use requirements.

For high-volume manufacturing, encapsulation via transfer molding offers the best cost-performance balance. In the transfer molding process, leadframes or laminate arrays are loaded - manually or automatically - into the cavity of the bottom mold and then the mold is closed and clamped under high pressure. Pellets of pre-heated (softened) mold compound material are then transferred under pressure via plunger movement into the mold cavity where the thermosetting material fills the available mold volumes and cures, yielding an encapsulated device (Figure 1).

Figure 2. Internal diagram of an SOIC.
Figure 2a.
Pre- and post-molded SOIC.
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While mold compounds are application-specific, there are a number of important materials property criteria for package performance. These include the coefficient of thermal expansion (CTE), glass transition temperature (Tg), room and high temperature moduli, the dependence of melt viscosity on time and temperature, adhesion characteristics (i.e. to leadframe and other package metallizations, BT laminate and die passivation), moisture absorption rate, warpage control and wire sweep performance, among others. It is important to understand that a change in any package material - including die attach and underfill - can affect mold compound reliability and, as such, compatible material selection is imperative.

Total Package Materials Compatibility

Because mold compound selection has a direct impact on other materials’ performance in the package, evaluating potential materials interactions and how they may alter in-process and in-field performance is critical to ensure long-term device function. SOICs, for example (Figures 2 and 2a), which account for over 60% of all SMT components used, have rigorous reliability requirements. The mold compounds used for these devices must pass JEDEC Level 2 260°C criteria at a minimum and, more preferably, JEDEC Level 1 260°C. However, if a high-performance die-attach material is paired with a mold compound that, while robust, doesn’t offer compatible performance, the material set may not achieve the targeted JEDEC performance and the device may fail after going through high-temperature reflow operation. Failures caused by material incompatibility are primarily stress or adhesion-induced, and can present in many different ways including die-attach delamination at the bondline, delamination at the pad top as well as die-top (mold compound-to-die passivation) delamination (Figure 3). However, when material sets are evaluated in the context of the specific package build and its related process conditions, optimum combinations can be achieved and these failures may be avoided.

When working with integrated packages such as SiPs, materials compatibility and mold compound performance characteristics become more critical. In this case, the mold compound comes in contact with a variety of materials including die-attach, underfills, solder paste/solder flux, laminate, solder resists, and various metallizations, and often must fill in under the passive components, paving the way for a plethora of possible non-optimized materials interactions (Figure 4). For SiPs, molding materials characteristics that should be considered are: good wire sweep performance - particularly for long, thin wires as small as 20 µm in diameter; the ability to adhere to a variety of surfaces including the die top, solder mask, and various substrate materials; superior flow capabilities to ensure good coverage around and under all of the components; and low warpage. Meeting all of these criteria is not an easy task, but in-package testing enables the development of optimized materials sets and confirmation of mold compound compatibility prior to any production investment.

Controlling Warpage

One of the most essential characteristics for modern array packages and emerging PoP applications is the ability to maintain package flatness throughout the singulation and board assembly processes. Though several variables can affect package warpage, the underlying package geometries, mechanical properties, and molding compound properties are the primary contributors.

Figure 3. Delamination can occur at several different locations. This cross-section of an SOIC reveals numerous delaminations.
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The molding compound is often required to control the final warpage characteristics of both the molded array and the singulated package. During the mold compound curing process, the package components become bound together by a network of cross-linked polymers, which inhibits free expansion or contraction. Because of chemical shrinkage and differences of the CTE of the package components, the device’s warpage can occur in one of two orientations: edges down (“crying face”) or edges up (“smiling face”). In array packages such as BGAs and QFNs, if the package does not stay flat, singulation becomes problematic and, ultimately, the device will not be suitable for PCB assembly. Likewise, packages that are intended for PoP applications must also remain completely flat. In the case where one package warps in the smiling face direction and one package warps in the crying face direction, attempting to stack these devices wil fail because solder connections in the center of the packages will not meet.

Novel materials-based technology addresses these issues and newer-generation mold compounds offer optimized warpage profiles as the package is exposed to multiple high-temperature reflows and the subsequent return to room temperature. By adjusting the core formulation components - resins, hardeners, fillers, catalysts and release agents - of the mold compound formulation, mold compound properties such as CTE, Tg, and shrinkage percentage can be altered, maintaining optimized flatness.

Next-generation Advances

Resolving mold compound challenges associated with higher temperature processing and developing advanced non-warping materials were certainly industry milestones. But, the need for even more efficient and higher throughput processing alternatives continues to drive the development of molding products. Manufacturers of automotive electronics, for example, are exploring the advantages of molding modules - in basic terms, a very large SiP equivalent - to replace traditional potting and encapsulation processes. And, even further developments in electronic molding techniques are occurring at a rapid pace. New methods of encapsulation; such as compression molding, whereby granulated mold compound is deposited onto the parts prior to mold closure; or liquid molding, which uses a lower viscosity liquid encapsulant in an analogous process; offer the potential of improved wire sweep and yields for high density components.

Figure 4. Inside a SiP: mold compound comes in contact with several different materials and metallizations.
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Without question, mold compounds have transformed the face of electronics manufacturing, enabling higher throughput, outstanding device protection, and product longevity. New manufacturing challenges, such as lead-free, pushed older-generation molding formulations to their limit and forced the development of materials capable of withstanding lead-free temperatures while also delivering warpage control for today’s advanced devices. By partnering with materials suppliers who design and test mold compounds in the context of total package materials compatibility and in-process performance, packaging specialists can rest assured that high yields can be achieved cost effectively.


Contact the authors for a complete list of references.

LOUIS RECTOR, senior research scientist; KOK-SOO GOH, technical service manager; AND SHAWN LIANG, application engineer; may be contacted at the electronics group of Henkel, 15350 Barranca Parkway, Irvine CA 92618; 949/789-2509; E-mail: