Table of Contents

Solid State Technology

Year 2018
Issue 2



Mechanism and improvements of Cu voids under via bottom

This work explores the effect of underlying metallic alloys and the influence of Cu loss under via bottom after dry etching and wet cleaning processes. To Improve the Cu loss under via bottom, effective approaches are proposed. The modified actions for via bottom improve not only wafer yield but also reliability of the device.


EUV lithography adds to increasing hydrogen demand at leading-edge fabs

On-site production an option for supply.

Process Watch

Process Watch: The (automotive) problem with semiconductors

This article is the first in a five-part series on semiconductors in the automotive industry. In this article, we introduce some of the challenges involved in the automotive supply chain. Future articles in the series will address specific process control solutions to those challenges.


Making the most of color in your multi-patterning layouts

There are many different situations in which special attention to color choices provide the potential to improve the manufacturing results of multi-patterned masks.


Samsung Electronics breaks ground on new EUV line in Hwaseong

Construction will be completed in the second half of 2019 and ready for production in 2020 Samsung aims to maintain its leadership in cutting-edge process technology under 7nm.

imec and Cadence tape out industry's first 3nm test chip

Extreme ultraviolet and 193 immersion lithography technology and Cadence digital tools used to design 3nm CPU core.

Top 10 semiconductor R&D spenders increase outlays 6% in 2017

Intel far surpasses others with R&D spending of $13.1 billion in 2017 and accounts for 36% of expenditures among Top R&D spenders.

New IC manufacturing lines to boost total industry wafer capacity 8%

Wafer capacity growth of 8% forecast for 2018 and 2019 versus 4.8% average yearly growth from 2012-2017.


Industry Forum

New insights from failures

To be able to guarantee the reliability of transistors, we have been conducting research for some years now at imec to see what happens when transistors operate properly and when they fail.