Notes from The ConFab 2016 – Day 1 of The Confab 2016

By Dick James, Senior Technology Analyst, Chipworks

The ConFab 2016 kicked off June 13 in the Encore Hotel in Las Vegas, the 12th in the series, presented by Solid State Technology (part of Extension Media), which they promote as the “Premier Conference and Networking Event for the Semiconductor Manufacturing & Design Industry.”

The event started with a networking reception Sunday night, giving the early arrivals a chance to mingle with some good food and wine. A feature of The Confab is that networking lunches and receptions are a focused part of the agenda, and time is set aside for face-to-face meetings; these can be pre-arranged by the event staff. Attendance is usually limited to ~150 so that there is ample time for everyone to get together over the three days.

As usual, Pete Singer was the conference chair, and the keynote speaker opening the event was Tom Caulfield, SVP and GM of GLOBALFOUNDRIES’ (GF) Fab 8 in Malta, New York, speaking on “Unlocking the IoT Opportunity for the Next Golden Age.” He surprised me at the start by saying that “the best years of semiconductors are ahead of us, not behind us,” given that it is hard to see even five years ahead at the moment, and pessimists are predicting that leading edge technologies will price themselves out of the business.

Tom Caulfield evangelizing the Next Golden Age of Semiconductors

Tom Caulfield evangelizing the Next Golden Age of Semiconductors

Tom then made the point that the main driver for the industry through its existence has been the evolution of connectivity, and the next phase will be as well.



And of course that takes us to the Internet of Things (IoT), currently at the peak of the hype curve, but undoubtedly a real phenomenon. McKinsey & Co. have predicted that by 2019/20 the IoT semiconductor value will be $50B – $75B, and they have broken it down nicely into segments and technologies;

What this doesn’t show is that all of the things will generate vast amounts of data, which will need a 5G communications infrastructure, which Tom described as huge, and maybe the biggest opportunity, rather than the silicon in the things themselves.

Then we moved on to the need for collaboration, the business model needs to innovate as well as the technology; though my perception is that there’s a good deal of collaboration in the industry already, though maybe not as much as needed. The GF-Samsung 14 nm agreement was mentioned (though I gather that it is 14 nm only), and design/technology co-optimization, which is now essential in the foundry business – Intel has been doing it for years.

The need for cooperation goes beyond the chip industry, though, and the Albany area was used as an example, since it embodies the three “E”s – education, economy, and ecosystem, i.e. workforce development, government support, and access to the tech cluster around CNSE.

Tom finished up with a plug for the new AMD Radeon 480 GPU, fabbed on the GF 14LPP process (we have one on order!), and a wrap-up of the above.

The theme of the morning session was “The Semiconductor Industry Outlook for 2016 and Beyond”. First up was Dan Armbrust, CEO of Silicon Catalyst, the industry’s first incubator company, which is trying to fill the void of start-up funding for new chip companies. I had not realised it, but the amount of venture capital (VC) money for start-up semiconductor companies has declined to near zero, even though VC funding is itself at almost record levels. Dan and his colleagues have set up a model whereby their partners provide in-kind support, reducing the need for actual seed capital, and Silicon Catalyst will also provide mentoring, physical space, business and legal services, and “lots of pizza”! Contributing partners


include TSMC, Synopsys, Advantest, Keysight, imec, PDF Solutions, Autodesk, Open Silicon, and the
MEMS foundry imt.

The next slide summarizes the model:


So far they have had three screening events, looked at 80+ applications, and selected ten companies for incubation. Seems like a good idea!

Lode Lauwers from imec was the next speaker; he did the usual obligatory description of imec’s capabilities and ecosystem, but once he got into the technical discussion, he put up a roadmap that extended to N+5, i.e. 2 nm, which is the first that I have seen.


In terms of possible technologies, I don’t think there’s anything new, but on our (now failing) two-year process cadence, that takes us out to 2026, so imec is looking a fair way ahead, and it seems the guys in R&D will have jobs for a while.

He also showed the following graphic of where broad applications fit on the roadmaps, so one perception is that IoT will only need technology down to 14 nm – I’m not sure the FDSOI lobby will agree with that, now that some of them are talking about stretching it to 7 nm.


He finished up with some examples of the collaborations that they are doing, using different flows and products such as memory and imagers.

My new colleague Kevin Gibb of TechInsights (TechInsights and Chipworks are now merging) next reviewed recent trends in chips, showing the scaling and some of the process changes we have seen in logic, DRAM and NAND flash technologies, and touching briefly on the die stacking in the Hynix HBM and a ReRAM example.



Kevin was followed by Hughes Metras, speaking for Europe’s other semiconductor collaborative research institute, CEA-Leti, with a slightly different roadmap, including FDSOI and their Coolcube monolithic 3D-stacking.


They are also looking at other forms of 3D integration, and Hughes showed examples of 2.5D/3D interposers showed Hughes showed examples of others that also include photonics devices amongst others. Of course we had examples of IoT – CEA-Leti has found applications in everything from medical to truck tires to pipelines.

Mark Reynolds from New York Empire State Development finished the morning session, describing the incentive programs that the state has in place to attract high-tech companies with high-income jobs there.

In essence this boils down to keeping the real estate off the books of the manufacturing company, by providing ready-to-go sites, infrastructure, and workforce, even going as far as building fabs with long term leases at incredibly competitive rates (e.g. $1!), and oftentimes including tooling and equipment. In addition there are tax credits, and the state has pumped oodles of cash into their schools, community colleges and universities to ensure a world class workforce.

We all know this has worked in luring AMD to build what is now the GLOBALFOUNDRIES fab in Malta; more recent examples are the new 300-mm ams fab in Utica (which has just started construction) Solar City in Buffalo (the largest PV plant in the US), the Soraa LED fab in Syracuse, and the GE SiC operation, with the fab in Albany and the packaging operation in Utica.

One could argue that it’s cheaper and easier just to write unemployment or welfare cheques for those in need, but the key to this strategy is the high-income jobs – surveys have shown (I’m told) that one job in a plant such as Malta has a five-to-one multiplier for other jobs, due to the infrastructure and social support (e.g. anything from schools to coffee shops) needed in the local area.

After lunch the main event of the afternoon was a panel on IoT, with Kelvin Low from Samsung Foundry, Rajeev Rajan from GF (VP IoT Product), Uday Tennety of GE Digital, and Jim Hewitt from Siemens as the moderator. There were lots of questions about applications and security, but occasionally we got onto the technology needed for IoT, and how compact the devices could be.

I was curious if the different elements could be integrated into one chip, since the basics of an IoT part are sensor(s), a microcontroller to process the data, a wireless interface, maybe some memory, and power management. These at the least require a range of process technology, since RF processes are usually different from logic and power, never mind the possibly of a MEMS sensor of some sort.

So I put the question, and was mildly surprised that both the foundry guys agreed that it is becoming possible, since FDSOI, with its back bias capability, allows a wider range of voltages and frequencies, and they clearly see this as an opportunity for them to get seriously into the IoT chip market.

The panel lasted an hour and a half or so, then we had a break before another reception.


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