SUNY Polytechnic Institute (SUNY Poly) announced today that Professor of Nanobioscience Dr. Nate Cady has been awarded $500,000 in funding from the National Science Foundation to develop advanced computing systems based on a novel approach to the creation of non-volatile memory architecture. This research, which will also support student opportunities, aims to advance todayâ€™s typical computing model, in which processing and memory are separate, by bringing them together to make the entire process faster and more energy efficient.
“I am proud to congratulate Professor Cady on this National Science Foundation (NSF) award which is focused on enabling advanced computing capabilities, and notably, has important implications for advances in artificial intelligence,” said SUNY Poly Interim President Dr. Grace Wang. “The NSFâ€™s selection of Dr. Cadyâ€™s research for this funding exemplifies the quality and impact of SUNY Polyâ€™s research where our faculty and students leverage our world-class high-tech resources, explore new frontiers, and develop critical technologies for our society.”
The research will enable the design of a scalable computing infrastructure that uses nanoscale non-volatile memory (NVM) devices for both storage and computation. One of the current limits to computing speed is the result of current personal computing architecture, which separates the processor and memory and leads to a cap on data throughput, known as the “von Neumann bottleneck.” By combining storage and computation on the same device, the project circumvents this barrier and creates scalable solutions for extreme-scale computingâ€”computing that is up to one thousand times more capable than current comparable computingâ€”based on wires that cross each other to form memory cells at every intersection. This more powerful capability is made possible because each memory cell, acting like a synapse of the human brain, can be switched on or off, similar to the 1â€™s and 0â€™s of current computing, but it can also store many other values between the on or off states, increasing the amount of information that a given memory cell can store exponentially.
“This grant showcases the incredible potential of our faculty to tackle real-world problems with high-tech solutions that stem from the SUNY Polyâ€™s advanced labs, cleanrooms, and capabilities. This news is especially exciting for a number of our graduate students who will be able to focus on this promising research area where they will be at the cutting-edge,” said SUNY Poly Interim Provost Dr. Steven Schneider.
“Dr. Cadyâ€™s research is a powerful example of the kind of expertise that SUNY Polyâ€™s faculty possess as our innovation-centered ecosystem provides us with unique opportunities to move the technologies of the future forward,” said SUNY Poly Interim Dean of the College of Nanoscale Sciences; Empire Innovation Professor of Nanoscale Science; and Executive Director, Center for Nanoscale Metrology Dr. Alain Diebold.
“I look forward to advancing this non-volatile memory research at SUNY Poly, using the institutionâ€™s cutting-edge fabrication facilities in order to address current computing bottlenecks that slow computing capability and waste energy,” said Dr. Cady. “This grant will drive the development of computing and memory infrastructure that will be evaluated using high-performance simulations and experimental benchmarking within our state-of-the-art laboratory at SUNY Poly where we are eager to develop the architecture that can help revolutionize processing and memory capabilities for next-gen computers.”
Dr. Cadyâ€™s research will support SUNY Poly graduate students who will be able to obtain hands-on experience developing the computing/memory structures. The materials for this project will be developed, demonstrated, and then integrated with traditional complementary metal-oxide-semiconductor (CMOS) computer chips as part of a larger production, which will utilize SUNY Polyâ€™s 200mm and 300mm state-of-the-art fabrication facilities. The University of Central Florida is receiving its own funds for collaborative research related to this effort.
Computing using multiple parallel flows of current through data stored in nanoscale “crossbars” is often fast and more energy-efficient, but the design of such crossbars is highly unintuitive for human designers. More specifically, this project explores formal methods for more efficiently conducting Boolean searches and using artificial intelligence techniques such as best-first search, in addition to automatically synthesizing non-volatile memory crossbar designs from specifications written in a high-level programming language.