Packaging

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PACKAGING ARTICLES



Broadcom to acquire CA Technologies for $18.9B in cash

07/13/2018  Broadcom Inc. and CA Technologies today announced that the companies have entered into a definitive agreement under which Broadcom has agreed to acquire CA to build one of the world's leading infrastructure technology companies.

Bruker announces acquisition of JPK Instruments

07/13/2018  Bruker Corporation today announced that it has acquired JPK Instruments AG (JPK), located in Berlin, Germany.

imec shows integrated 5G chip directions

07/12/2018  To fulfill the promise of the Internet of Things (IoT), the world needs low-cost high-bandwidth radio-frequency (RF) chips for 5th-generation (5G) internet technology.

Industry overshooting capital spending needs for NAND flash memory

07/11/2018  Overspending by the major NAND suppliers expected to further cool NAND flash prices this year.

FET fabrication from fins to nano-sheets

07/11/2018  As the commercial IC fabrication industry continues to shrink field-effect transistor (FET) sizes, 2D planar structures evolved into 3D fins which are now evolving into 3D stacks of 2D nano-sheets.

Intel wins SEMI Award at SEMICON West for process and integration

07/11/2018  Intel has won SEMI's 2018 Award for the Americas. SEMI honored the celebrated chipmaker for pioneering process and integration breakthroughs that enabled the first high-volume Integrated Silicon Photonics Transceiver. The award was presented yesterday at SEMICON West 2018.

The outlook for new metrology approaches

07/10/2018  To keep up with Moore's Law, the semiconductor industry continues to push the envelope in developing new device architectures containing novel materials.

The cobbler's children getting shoes?

07/10/2018  There's an old proverb that the shoemaker's children always go barefoot, indicating how some professionals don't apply their skills for themselves. Until lately, that has seemed the case with the semiconductor manufacturing industry which has been good at collecting massive amounts of data, but no so good at analyzing that data and using it to improve efficiency, boost yield and reduce costs.

High gas flow rates create pumping challenge

07/10/2018  Increasingly complicated 3D structures such finFETs and 3D NAND require very high aspect ratio etches. This, in turn, calls for higher gas flow rates to improve selectivity and profile control. Higher gas flow rates also mean higher etch rates, which help throughput, and  higher rates of removal for etch byproducts.

Material innovations for advancements in fan-out packaging

07/09/2018  The development of a new class of materials with superior functionalities is essential to enable emerging process schemes for wafer- or panel-level FO packaging.

Optimized stepping for fan-out wafer and panel packaging

07/09/2018  Optimized stepping, based on parallel analysis of die placement errors and prediction of overlay errors, can increase lithography throughput by more than an order of magnitude and deliver commensurate reductions in cost of ownership. The productivity benefits of optimized stepping are demonstrated using a test reticle with known die placement errors.

Big changes at the top and bottom of Q1 semiconductor equipment market shares

07/09/2018  Market shares of semiconductor equipment manufacturers shifted significantly in Q1 2018 as Applied Materials, the top supplier dropped, according to the report “Global Semiconductor Equipment: Markets, Market Shares, Market Forecasts,” recently published by The Information Network.

Imec demonstrates hybrid finFET-silicon photonics technology for ultra-low power optical I/O

07/09/2018  Today at its Imec Technology Forum USA in San Francisco, imec, the research and innovation hub in nano-electronics and digital technology, announced that it has demonstrated ultra-low power, high-bandwidth optical transceivers through hybrid integration of Silicon Photonics and FinFET CMOS technologies.

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WEBCASTS



Advanced Packaging

Date and time TBD

Back-end packaging is increasingly important to semiconductor device form factor, thermal and power performance, and costs. Compounded by the demand for lead-free processing and the soaring cost of gold, the industry is developing new approaches to packaging, including redistribution layers (RDL), through silicon vias (TSV), copper pillars, wafer-level packaging (WLP) and copper wire bonding. Experts will discuss these and other approaches in this webcast.

Sponsored By:

Lithography

Date and time TBD

EUV lithography has been under intense development for years and appears to be close to production. Yet its delay has the industry searching for alternatives, including double, triple and even quadruple patterning, directed self-assembly, multi-e-beam and nanoimprint. In this webcast, experts will detail various options, future scenarios and challenges that must still be overcome.

Sponsored By:

Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

Sponsored By:

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TECHNOLOGY PAPERS



Maximize uptime and optimize maintenance with AMS

Yukinobu Hayashi, Senior Field Applications Engineer from CyberOptics, explains the application uses of the WaferSense® Auto Multi Sensor™ (AMS) for Leveling, Vibration, and Relative Humidity (RH) that facilitates maximizing uptime and optimizes maintenance. The combination of these attributes in a thin wafer shaped all-in-one wireless sensor, provides engineers the ability to acquire highly repeatable measurements of tilt, vibration, and humidity while under a vacuum and without venting a chamber. The quantitative numeric results give engineers an objective basis for comparisons, and analysis that can be reproducible across multiple users over extended periods of time. June 13, 2018
Sponsored by CyberOptics

Leveraging Baseline Checks for Robust Reliability Verification

As IP and IC designers and verification teams tackle increased complexity and expectations, reliability verification has become a necessary ingredient for success. Automotive, always-on mobile devices, IOT and other platforms require increasingly lower power envelopes and reduced device leakage while maintaining overall device performance. Foundries have also created new process nodes targeted for these applications. Having the ability to establish baseline checks for design and reliability requirements is critical to first pass success. January 08, 2018
Sponsored by Mentor Graphics

Testing PAs under Digital Predistortion and Dynamic Power Supply Conditions

The power amplifier (PA) – as either a discrete component or part of an integrated front end module (FEM) – is one of the most integral RF integrated circuits (RFICs) in the modern radio. In Part 2 of this white paper series, you will learn different techniques for testing PAs via an interactive white paper with multiple how-to videos.September 06, 2017
Sponsored by National Instruments

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