High-res 3D X-ray microscopy for non-destructive failure analysis of chip-to-chip micro-bump interconnects in stacked die packages

BY SYAHIRAH MD ZULKIFLI, BERNICE ZEE AND WEN QIU, Advanced Micro Devices, Singapore; ALLEN GU, ZEISS, Pleasanton, CA

3D integration and packaging has challenged failure analysis (FA) techniques and workflows due to the high complexity of multichip architectures, the large variety of materials, and small form factors in highly miniaturized devices [1]. The drive toward die stacking with High Bandwidth Memory (HBM) allows the ability to move higher bandwidth closer to the CPU and offers an oppor- tunity to significantly expand memory capacity and maximize local DRAM storage for high throughput in the data center. However, the integration of HBM results in more complex electrical communications, due to the emerging use of a physical layer (PHY) design to connect the chip and subsystems. FIGURE 1 shows the schematic of a 2.5D stacked die package designed so that some HBM μbumps are electrically connected to the main CPU through a PHY connection. In general, the HBM and CPU signal length needs to be minimized to reduce drive strength requirements and power consumption at the PHY.

Screen Shot 2018-03-01 at 11.46.34 AM

This requirement poses new challenges in FA fault isolation. A traditional FA workflow using electrical fault isolation (EFI) techniques to isolate the defect becomes less effective for chip-to-chip interconnects because there are no BGA balls for electrically probing the μbumps at the PHY. As a result, new defect localization techniques and FA flows must be investigated.

XRM theory

X-ray imaging is widely employed for non-destructive FA inspection because it can explore interior structures of chips and packages, such as solder balls, silver paste and lead frames. Thus, many morphological failures, such as solder-ball crack/burn-out and bumping failure inside IC packages, can be imaged and analyzed through X-ray tools. In 2D X-ray inspection, an X-ray irradiates samples and a 2D detector utilizes the projection shadow to construct 2D images. This technique, however, is not adequate for revealing true 3D structures since it projects 3D structures onto a 2D plane. As a result, important information, such as internal faulty regions of electronic packages, may remain hidden. This disadvantage can be overcome by using 3D X-ray microscopic technology, derived from the original computed tomography (CT) technique. In a 3D imaging system, a series of 2D X-ray images are captured at different angles while a sample rotates.

These 2D images are used to reconstruct 3D X-ray tomographic slices using mathematic models and algorithms. The spatial resolution of the imaging technique can be improved through the integration of an optical microscopy system. This improved technology is called 3D X-ray microscopy (XRM) [2]. FIGURE 2 shows an example 3D XRM image for a stacked die. The image clearly shows the internal structures – including the TSV, C4 bumps and μbump of the electronic components – without physically damaging or altering the sample. The high resolution and quality shown here are essential to inspect small structural defects inside electronic devices. With its non-destructive nature, 3D XRM has been useful for non-destructive FA for IC packaging devices.

Screen Shot 2018-03-01 at 11.46.42 AM

Failure analysis approach

The purpose of an FA workflow is to have a sequence of analytical techniques that can help to effectively and quickly isolate the failure and determine the root cause. Typical FA workflows for flip-chip devices consist of non-destructive techniques such as C-Mode scanning acoustic microscopy (C-SAM) and time domain reflectometry (TDR) to isolate the failure, followed by destructive physical failure analysis (PFA). However, there are limitations to each of these techniques when posed with the failure analysis of a more complex stacked die package.

C-SAM allows the inspection of abnormal bumps, delamination and any mechanical failure. A focused soundwave is directed from a transducer to a small point on a target object and is reflected when it encounters a defect, inhomogeneity or a boundary inside the material. The transducer transforms the reflected sound pulses into electromagnetic pulses, which are displayed as pixels with defined grey values thereby creating an image [3]. However, stacked die composed of a combination of multiple thin layers may complicate C-SAM analysis. This is because the thin layers have smaller spacing between the adjacent interface, and shorter delay times for ultrasound traveling from one interface to another. Therefore, failures between the die and die attach may not be easily detected, and false readings may even be expected.

TDR is an electrical fault isolation tool that enables failure localization through electrical signal data. The TDR signal carries the impedance load information of electrical circuitry; hence, the reflected signals show the discontinuity location that has caused the mismatch of impedance. In-depth theory on TDR is further discussed in Chin et al [4]. However, TDR can only estimate where the failure lies, whether it is in the substrate, die or interposer region. To pin point the exact location within the area of failure is difficult, due to limitations in separating the various small structures through the TDR signal. Additionally, some of the pulse power is reflected for every impedance change, posing challenges regarding unique defect isolation and signal complexity – especially for stacked die [5]. In cases where the failure pins reside in the HBM μbump region, no BGA ball out is available to probe and send an electrical pulse through.

Physical Failure Analysis (PFA) is a destructive method to find and image the failure once non-destructive fault isolation is complete. PFA can be done both mechanically and by focused ion beam (FIB). For stacked dies, FIB is predominantly used to image smaller interconnect structures such as TSVs and μbumps. However, the drawback is that the success of documenting the failure through PFA is largely dependent on how well the non-destructive FA techniques can isolate the failure region. Without good clear fault isolation direction, the failure region might be destroyed or missed during the PFA process, and thus no root cause can be derived.

The integration of XRM into the FA flow can help to overcome the limitations of the various analysis techniques to isolate the failure. It is a great advantage to image small structures and failures with the high spatial resolution and contrast provided by XRM and without destroying the sample. For failures in stacked die, XRM can be integrated into the FA flow for further fault isolation with high accuracy. The visualization of defects and failed material prior to destructive analysis increases FA success rates. However, the trade-off for imaging small defects at high resolution is time. For stacked die failures, C-SAM and TDR can first be performed to isolate the region of failure. With a known smaller region of interest to focus on, the time taken for XRM to visualize the area at high resolution is significantly reduced.

In cases where failures are identified in the HBM μbump, XRM is an effective technique to isolate the failure through 3D defect visualization. With the failure region isolated, XRM can then act as a guide to perform further PFA. Following are three case studies where XRM was used to image HBM packages with stacked dies.

Case studies

In the first case study, we explore the application of XRM as the primary means of defect visualization where other non-destructive testing and FA techniques are not possible. An open failure was reported for non-underfilled stacked die packages during a chip package interaction (CPI) study. The suspected open location was within the μbump joints at the HBM stack/ interposer interface. The initial approach exposed the bottom-most die of the HBM stack, followed by FIB cross-sectioning at the specified location. Performing the destructive approach to visualize the integrity of μbump joints in non-underfilled stack die packages was virtually impossible due to the fragility of silicon. The absence of underfill (UF) means that the HBM does not properly adhere to the interposer and is susceptible to peel off. In addition, there was no medium to release shear stresses experienced by the μbump joints upon bending stresses, which could not be absorbed by the package. As seen in FIGURE 3, parallel lapping of the HBM stack without UF caused die crack and peeling.

Screen Shot 2018-03-01 at 11.46.50 AM

Consequently, to avoid aggravating the damage on the sample, 3D XRM was performed to inspect and visualize the suspected location using a 0.7μm/voxel and 4X objective without any sample preparation. FIGURE 4 shows an example virtual slice where the micro-cracks throughout the row of μbump joints are visualized. The micro-cracks are measured a few microns wide. It is worth noting that the micro-cracks were visible with a short scan time of 1.5 hrs.

Screen Shot 2018-03-01 at 11.47.00 AM

With the critical defect information in 3D, PFA was performed on a sample that was underfilled to facilitate ease of sample preparation. SEM images in FIGURE 5 validated the existence of μbump micro-cracks observed by 3D XRM inspection.

In the second case study, the 3D XRM technique was applied to a stacked die package with a failure at a specific HBM/XPU physical interface (PHY) μbump connection. This μbump connection provides specific communication between the HBM stack and XPU die, and there is no package BGA ball out to enable electrical probing. Accordingly, it was not possible to verify if the failure type was an open or short. In addition, there was no means to determine if the failure was at the HBM or XPU die. Since defects from previous lots were open failures at the PHY μbump of the HBM, 3D XRM was performed at the suspected HBM open region using a 0.85μm/voxel and 4X objective.

As no defect was observed, XRM was then applied to the corresponding XPU PHY μbump. Contrary to the anticipated μbump open, a short was observed between two μbumps as shown in FIGURES 6a and 6b.

Screen Shot 2018-03-01 at 11.47.22 AM Screen Shot 2018-03-01 at 11.47.28 AM


The μbump short resulted from a solder extrusion bridging two adjacent μbumps. If 3D XRM had not been performed, a blind physical cross-section likely would have been performed on the initially suspected open region. As a result, the actual failure region may have been missed and/or destroyed.

In the final case study, an open failure was reported at a signal pin of a stack die package. As per the traditional FA flow, C-SAM and TDR techniques were applied to isolate the fault. C-SAM results showed an anomaly, and TDR suggested an open in the substrate as demonstrated in FIGURE 7a and 7b respectively.

Screen Shot 2018-03-01 at 11.47.10 AM Screen Shot 2018-03-01 at 11.47.16 AM

To verify the observations made by C-SAM and TDR non-destructive techniques, 3D XRM was performed using a 0.80μm/voxel and 4X objective at the region of

FIGURE 8 revealed a crack between the failure C4 bump and associated TSV. A physical cross-section was performed and the passivation cracks between the TSV and interposer backside redistribution layer (RDL) was observed as shown in FIGURE 9.

Screen Shot 2018-03-01 at 11.47.35 AM

In this case, 3D XRM provided 3D information for the FA engineer to focus on. Without the visual knowledge on the defect’s nature and location, the defect would have been missed during PFA.

Summary and conclusions

3D integration and packaging have brought about new challenges for effective defect localization, especially when traditional electrical fault isolation is not possible. 3D XRM enables 3D tomographic imaging of internal structures in chips, interconnects and packages, providing 3D structural information of failure areas without the need to destroy the sample. 3D XRM is a vital and powerful tool that helps failure analysis engineers to overcome FA challenges for novel 3D stacked-die packages.


This article is based on a paper that was presented at the 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2017).


  1. F. Altmann and M. Petzold, “Innovative Failure Analysis Techniques for 3-D Packaging Developments,” IEEE Design & Test, Vol. 33, No. 3, pp. 46-55, June 2016.
  2. C. Y. Liu, P. S. Kuo, C. H. Chu, A. Gu and J. Yoon, “High resolution 3D X-ray microscopy for streamlined failure analysis workflow,” 2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), Singapore, 2016, pp. 216-219.
  3. M. Yazdan Mehr et al., “An overview of scanning acoustic microscope, a reliable method for non-destructive failure analysis of microelectronic components,” 2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro- electronics and Microsystems, Budapest, 2015, pp.1-4.
  4. J. M. Chin et al., “Fault isolation in semiconductor product, process, physical and package failure analysis: Importance and overview,” Microelectronics Reliability, Vol. 51, Issue 9, pp. 1440-8, Nov. 2011.
  5. W. Yuan et al., “Packaging Failure Isolation with Time-Domain Reflectometry (TDR) for Advanced BGA Packages,” 2007 8th International Conference on Electronic Packaging Technology, Shanghai, 2007, pp. 1-5.


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won’t automatically be posted to your social media accounts unless you select to share.

One thought on “High-res 3D X-ray microscopy for non-destructive failure analysis of chip-to-chip micro-bump interconnects in stacked die packages

  1. Jeff McGrew

    I especially appreciate the comments of the difficulty getting good images on CSAM with layered die. I would like to see an article about techniques that give tips on how to get better images with these layered die on a CSAM device.


Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>


Leak check semiconductor process chambers quickly and reliably
02/08/2018INFICON,a manufacturer of leak test equipment, introduced the UL3000 Fab leak detector for semiconductor manufacturing maintenance teams t…
Radiant Vision Systems announces new automated visual inspection system
11/06/2017Radiant Vision Systems, a provider of high-resolution imaging solutions for automated visual analysis of devices and surfaces, an…
SEMI-GAS Xturion Blixer enables on-site blending of forming gas mixtures
10/03/2017The Blixer provides a cost-effective alternative to purchasing expensive pre-mixed gas cylinders by enabling operators to blend …