By Dr. Phil Garrou, Contributing Editor
TMV vs PMV
At the recent IMAPS conference, Samsung electro-mechanics compared their Plated Mold Via Technology (PMV) to the well known Amkor Through Mold ViaÂ (TMV) technology. The two process flows are compared below.
Samsung EM describes the driving force for this new technology as the added adhesion that they get by replacing the solder TMV fill with copper in the PMV.
Seeking input from Glenn Rinne of Amkor, IFTLE found out that Amkor has run both processes and seen that the laser formed vias have both cavities and protrusions in the via walls due to the filler in the mold compound. The cavities serve as a â€śroughnessâ€ť which anchors the solder fill and the filler particles protruding into the vias actually shadow the deposition of seed layer when copper is plated into the holes so they concluded that the solder, which is â€śconductive enoughâ€ť actually shows better adhesion and is a cheaper process.
TSMC Continues move into packaging
TSMC is purchasing a plant in Longtan, Taiwan from Qualcomm for $85MM and turning it into a facility devoted to the development of the advanced integrated fan-out wafer-level packaging (InFO-WLP) technology. TSMC could initiate manufacturing as early as 2016 on 16nm chips, but HVM date will depend on â€ścustomer demandâ€ť [link]
TSMC and Samsung battle for Apple and Qualcomm Orders
It is reported that both Apple and Qualcomm will likely buy a larger proportion of 14 nanometer smartphone chips from Samsung rather than TSMC beginning in the second half of 2015 [link].
Given that Samsung has more advanced manufacturing technology to produce fin field-effect transistor, the company is reportedly more likely to win Appleâ€™s contract for A9 processor production, said research institute Bernstein Research.
The Commercial Times reports that Qualcomm has already started working with Samsung to develop the chips. The Economic Daily News adds that Qualcomm has already placed orders with Samsung.
3D Memory Stacks Finally Arrive
For those of you struggling with all the new memory architectures that have been announced, I recommend the recent article by Yole Developpement which details announcements by Hynix, Samsung, Micron and Tezzaron [link]. With the recent Samsung announcement of mass production of 64 GB DDR4 DIMMs that use TSV technology for enterprise servers and cloud-based applications, all three of the major DRAM memory manufactures, Samsung, Hynix and Micron, have now announced the commercialization of TSV based memory architectures.
Different applications will have different requirements in terms of bandwidth, power consumption, and footprint. As we move into 2015 several industry segments have announced applications using the new memory stacks. Intel recently announced that their Xenon Phi processor â€śKnights Landing,â€ť which will debut in 2015 will use 16GB of Micron HMC stacked DRAM on-package, providing up to 500GB/sec of memory bandwidth for high performance computing applications.Â AMD and Nvidia have also announced the use of HBM in their next generation graphics modules like the Nvidia Pascal due out in 2016.
For all the latest on 3DIC and advanced packaging, stay linked to IFTLE.
When is HMC no longer HMC but rather just 3D-TSV-DRAM? Intel and Micron made it clear that Intel is using a memory stack from Micron that was “derived from HMC” and they call it MCDRAM, multi-channel DRAM. Which sounds like maybe a stack of dumb DRAM layers sitting on an Intel piece of silicon.
HMC, as Micron promotes it, is a whole new paradigm of abstracted DRAM nirvana. It has SerDes, a switch, vault controllers, RAS features and more. With all this the performance is non-deterministic. I doubt the Knights Landing CPU is willing to tolerate that. And remember, the predecessor CPU used GDDR5.
So letâ€™s call the Intel KNL memory by Intelâ€™s official name “MCDRAM”, or in laymans terms ‘TSV stacked DRAMâ€™.