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AI Focus of The ConFab

Artificial Intelligence will be a focus of The ConFab 2018, to be held May 20-23 at The Cosmopolitan of Las Vegas. We’ll hear from a variety of speakers on why A.I. is so important to the semiconductor industry, not only in terms of the new types of chips that will be required, but how A.I. will bring dramatic improvements to the semiconductor manufacturing process.

“The exciting results of AI have been fueled by the exponential growth in data, the widespread availability of increased compute power, and advances in algorithms,” notes Rama Divakaruni of IBM, our keynote speaker. “Continued progress in AI – now in its infancy – will require major innovation across the computing stack, dramatically affecting logic, memory, storage, and communication.”

Rama will explain how the influence of AI is already apparent at the system-level by trends such as heterogeneous processing with GPUs and accelerators, and memories with very high bandwidth connectivity to the processor. The next stages will involve elements which exploit characteristics that benefit AI workloads, such as reduced precision and in-memory computation. Further in time, analog devices that can combine memory and computation, and thus minimize the latency and energy expenditure of data movement, offer the promise of orders of magnitude power-performance improvements for AI workloads.

John Hu, Director of Advanced Technology, Nvidia Corporation will also address AI in a talk titled “The Era of Deep Learning IC Industry Driven by AI, Autonomous Driving and Virtual Reality.” Hu notes that the “big bang” of AI and autonomous driving has driven the IC industry into a new era of rapid growth and innovation. In his talk, Hu will describe how the next 1000 times of improvement requires a new paradigm shift in the collaboration and co-optimizations across the whole industry; from materials, process technologies, design and chip/system platform. In this era that machine(s) can improve themselves by deep learning, hear how the semiconductor industry also needs to have the capability of deep learning for innovation, to stay ahead in the changing competitive landscape.

“Artificial intelligence has brought human beings to a point in history, for our industry and the world in general, that is more revolutionary than a small, evolutionary step,” says Howard Witham, Vice President of Texas Operations at Qorvo, who will speak on the potential of AI in the semiconductor fab. Howard will describe how AI provides predictive maintenance, auto defect and wafer map classification, outlier detection, automated recipe setups based on device requirements and upstream data, and dynamic interpolation and guard-banding.

Please join us for these and other insightful talks, including one from Google’s John Martinis on quantum computing. Visit www.theconfab.com for more information.

Join Us at The ConFab 2018

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The ConFab 2018, to be held May 20-23 at The Cosmopolitan of Las Vegas, is a conference and networking event designed to inform and connect leading semiconductor executives from all parts of the supply chain. Now in its 14^th year, it is produced by Solid State Technology magazine, the semiconductor industry’s oldest and most respected business publication.

The goal of The ConFab this year is to show how today’s semiconductor manufacturers and their suppliers can they best position themselves to take advantage of the tremendous growth the industry is expecting to see in the near future, propelled by a wide array of new applications, including artificial intelligence, virtual and augmented reality, automotive, 5G, the IoT, cloud computing and healthcare.

Here’s a quick look at the agenda as it stands now.

After a welcome reception on Sunday evening, we’ll kick things off on Monday with a talk by IBM’s Rama Divakaruni on “How A.I. is Driving the New Semiconductor Era.” Although A.I. (and associated deep learning and machine learning) is now in its infancy, it will likely to have a major impact on how semiconductors will be designed and manufactured in the future. A.I. will demand dramatic enhancement in computational performance and efficiency, which in turn will drive fundamental changes in algorithms, systems and chip design. Devices and materials will also change.

Following Rama’s talk, we’ll hear from John M. Martinis, Google who heads up Google’s Quantum A.I. Lab. The lab is particularly interested in applying quantum computing to artificial intelligence and machine learning.

After the keynote talks, we’ll hear from a number of industry visionaries, including John Hu, Director of Advanced Technology for Nvidia, Dan Armbrust, Founder and Director of Silicon Catalyst, and Tom Sonderman, President of Sky Water Technology Foundry. On Monday afternoon, invited industry experts, such as Bill Von Novak of Qualcomm will drill down into the applications most critical to semiconductor industry growth, including automotive, networking, healthcare and the IoT.

On Tuesday, the talks will focus on manufacturing trends and challenges with mainstream semiconductor manufacturing the focus of the morning session and advanced packaging the focus in the afternoon. George Gomba, VP of technology research at GlobalFoundries, will provide an update on EUV lithography, followed by Koukou Suu, of Ulvac, a leading expert on materials for phase change memories. Howard Witham, Vice President of Texas Operations, Qorvo, will provide some insights in using artificial intelligence and automation in semiconductor manufacturing.

The advanced packaging session on Tuesday afternoon is organized and sponsored by IEEE CPMT, notably Li Li, Distinguished Engineer, Cisco and William Chen, Fellow, ASE. The semiconductor industry is increased relying on advanced packaging to deliver far more integrated, complex and advanced solutions for different market segments.

On Wednesday, we’ll hear from leading analysts, including Len Jelinek, Senior Director, Semiconductor Manufacturing at IHS Markit, and Jim Feldhan, President of Semico, on market trends and the expected business climate moving forward.

You can register and keep up-to-date by visiting www.theconfab.com. For sponsorship inquiries, contact Kerry Hoffman at [email protected]. For those interested in attending as a guest or qualifying as a VIP, contact Sally Bixby at [email protected].

The ConFab 2018 Update

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A new wave of growth is sweeping through the semiconductor industry, propelled by a vast array of new applications, including artificial intelligence, virtual and augmented reality, automotive, 5G, the IoT, cloud computing, healthcare and many others. The big question facing today’s semiconductor manufacturers and their suppliers is how can they best position themselves to take advantage of this tremendous growth.

Finding answers to that question is the goal of The ConFab 2018, to be held May 20-23 at The Cosmopolitan of Las Vegas. Now in its 14th year, The ConFab is a conference and networking event designed to inform and connect leading semiconductor executives from all parts of the supply chain. It is produced by Solid State Technology magazine, the semiconductor industry’s oldest and most respected business publication.

Kicking things off will be IBM’s Rama Divakaruni, who will speak on “How AI is Driving the New Semiconductor Era.” This is hugely important to how semiconductors will be designed and manufactured in the future, because AI — now in its infancy — will demand dramatic enhancement in computational performance and efficiency. Fundamental changes will be required in algorithms, systems and chip design. Devices and materials will also need to change.

Rama is well position to address these changes: As an IBM Distinguished Engineer, he is responsible for IBM Advanced Process Technology Research (which includes EUV technologies and advanced unit process and Enablement technologies) as well as the main interface between IBM Semiconductor Research and IBM’s Systems Leadership. He is one of IBMs top inventors with over 225+ issued US patents.

We’re also pleased to announce several other speakers at this point. Joining us will be George Gomba, VP of technology research at GlobalFoundries. George has overall responsibility for GlobalFoundries’ semiconductor technology research programs, including global consortia and strategic supplier management (and, like Rama, has a long history at IBM). The focus of George’s talk will be on EUV lithography.

Dan Armbrust, Founder and Director of Silicon Catalyst, the world’s first incubator focused exclusively on semiconductor solutions startups will also be on the dais. A frequent speaker at The ConFab, Dan has a great background, including President and Chief Executive Officer of SEMATECH, IBM VP, 300mm Semiconductor Operations, and Strategic Client Exec for IBM’s Systems and Technology Group.

Another great speaker is Tom Sonderman, President of SkyWater Technology Foundry. Tom also has a great background including GlobalFoundries’ VP of manufacturing technology, and two decases at AMD, where he had global responsibility for development, integration, support and scalability of automation and manufacturing systems in the company’s wafer fabrication and assembly operations. Prior to joining SkyWater, Prior to joining SkyWater, Tom was the group vice president and general manager for Rudolph Technologies’ Integrated Solutions Group. In this position, he created a Smart Manufacturing ecosystem based on big data platforms, predictive analytics and IoT.

We’re so excited about the other speakers we tentatively have lined up, our plans for several thought-provoking panels and much more, so stay tuned. You register and keep up-to-date by visiting www.theconfab.com. For sponsorship inquiries, contact Kerry Hoffman at [email protected]. For those interested in attending as a guest or qualifying as a VIP, contact Sally Bixby at [email protected].

The ConFab 2018 will be held May 20-23

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The ConFab 2018, to be held May 20-23 in Las Vegas, will take a close look at the new applications driving the semiconductor industry, the technology that will be required at the device and process level to meet new demands, and – perhaps most importantly – the kind of strategic collaboration that will be required. It is this combination of business, technology and social interactions that make The ConFab so unique and so valuable. Here are six key trends that will each have a huge impact in the near future:

The semiconductor industry is on the cusp of a new era of growth, driven by a diverse array of applications. Much of the growth will come from the need for better connectivity and more intelligent data analysis.
In the Internet of Things (IoT), data is captured by sensors and transferred via the appropriate networks, stored in data centers and analyzed. This creates demand for high performance computing, including artificial intelligence and “deep learning.” New computational methods are emerging, such as neuromorphic methods that mimic how the brain works.
Faster communication with higher bandwidth will be required. 5G wireless communication is coming, as is improved WiFi, near-field communication, Bluetooth and satellite communication.
Huge opportunities exist in automotive electronics, as autonomous driving moves closer to reality.
Virtual reality will be combined with artificial intelligence to create a truly immersive experience that mankind has never experienced.
Semiconductors will play an increasingly important role in the healthcare industry, as diagnostic tools and patient monitoring.

To meet the demands of these diverse applications, much innovation will be required on the technology side. Huge efforts are also needed to reduce the overall cost. Since the beginning, the economics of semiconductor manufacturing has been a focal point of The ConFab. In 2018, we will be including insights into the emerging and rapidly growing new markets and what semiconductor device manufacturers need to know to successfully tap into those markets.

New technology needed in manufacturing will be another focal point of The ConFab. EUV is finally entering volume production, ushering in a new era of patterning for the 7 and 5nm generations. Many new materials are being considered, transistors are evolving from FinFETs to gate-all-around nanowires, on chip communication with silicon photonics will soon emerge, and advanced packaging/heterogeneous integration is ever more critical.

There is a strong need for strategic collaboration across the entire supply chain. Empowering that collaboration is a high priority goal for The ConFab 2018. We do that through private, pre-arranged meetings among interested parties. The ConFab also includes well-attended evening receptions plus breakfasts, lunches and refreshment breaks. These offer exceptional networking opportunities for people to meet in a relaxed environment.

In 2018, we expect heightened interest and involvement as we explore how businesses, people and technology must all work together to meet the world’s insatiable demand for new electronics.

The ConFab Preview

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The agenda is set for The ConFab, to be held May 14-17, 2017 in San Diego at the iconic Hotel del Coronado. While reviewing the abstracts for just the Monday morning session, it struck me how well our speakers will cover the complex opportunities and challenges facing the semiconductor industry.

In the opening keynote, for example, Hans Stork, Senior Vice President and Chief Technical Officer, ON Semiconductor we will discuss the challenge to realize high signal to noise ratio in small (read inexpensive) and efficient form factors, using examples of image sensors and power conversion in automotive applications. “It seems that at last, after many decades of exponential progress in logic and memory technologies, the “real world” devices of power handling and sensor functions are jointly enabling another wave of electronics progress in autonomously operating and interacting Things,” he said.

Next, Subramani Kengeri, Vice President of CMOS Platforms Business Unit, GLOBALFOUNDRIES, will describe how the rapid growth of applications in the consumer, auto and mobile space coupled with the emergence of the Internet of Things (IoT) is driving the need for differentiated design and technology solutions. “While die-cost scaling is slowing down and power density is emerging as a major challenge, fabless semiconductor companies are hungry for innovation using application optimized technology solutions. Specifically, emerging SoC innovations are driving the need for low-power, performance, cost, and time-to-volume that solves the issues of voltage scaling and integration of “user-experience” functions,” he notes.

Islam Salama, a Director with Intel Corporation responsible for packaging substrate Pathfinding of the high-density interconnect across all Intel products, looks at it from a connectivity perspective. “The pervasive nature of computing drives a need for connecting billions of people and tens of billions of devices/things via cloud computing. Such connectivity effect will generate tremendous amounts of data and would require a revolutionary change in the technology infrastructures being used to transmit, store and analyze data,” he said.

Next-generation electronics will require several new packaging solutions, he adds. Smaller form factors, lower power consumption, flexible designs, increased memory performance, and-more than ever, a closely managed silicon package, co-optimization and architectural innovations. Heterogeneous integration through package with technologies such as system in package (SIP), on package integration (OPI) and fan-out (WLFO and PLFO) are poised to change the packaging industry and play a disruptive role in enabling next generation devices.

Heterogeneous Integration is also the focus of a talk by Bill Bottoms, Chairman and CEO, Third Millennium Test Solutions. Bill will report on the collaboration in the making of the HIR Roadmap to address disruptive changes in the global IT network, the explosive growth coming for IoT sensors and the multi-sensor fusion and data analytics that extract “awareness” from the expanding data.

I’m very much looking forward to these and many other talks this year, and the exciting panel discussions and networking events we have planned.

The New Driver for Semiconductor Tech

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Over the past 40 years, the electronics industry has gone through three distinct stage or “waves” of evolution. Last year, in a Solid State Technology webcast presentation, Intel’s Islam Salama described the waves and how the latest wave is driving the semiconductor industry in new and very different ways. Dr. Salama is responsible for packaging substrate pathfinding of high density interconnects across all Intel products. His team focuses on packaging substrate architectures, process and materials technology building blocks, intellectual property management, and manufacturing ecosystem development.

The first wave occurred in the 1990s, driven mainly by personal computers and enterprise servers. The 2000s saw the very wide adoption of smartphones and cellular phones. “This really provided a very solid platform for industry growth, Salama said.

But today, a major shift is under way. “Starting in 2010, we started to see a generational shift in the IT architecture. This shift is really reshaping every aspect of our economy and industry, and defining the opportunities that are available for growing the industry moving forward,” he said. This shift – you guessed it – is driven smart devices, cloud computing and the IoT.

“As we experience pervasive computing behavior, we demand consistency and seamless interface among all our devices as we use them throughout the day,” Salama said. “It becomes a cycle. The more pervasive computing becomes, the more demand there is on the cloud and the data center. In the process, you create new application and you try to come up with new devices that keep up with the applications, and the cycle feeds on itself.”

The IoT will bring an explosion of data.

Big and small data being generated by the IoT and smartphones is seen as the next big disrupter. In Wave 2 (the 2000s), PCs generated 90 MB/day and smartphones 30MB/day. In Wave 3, the numbers jump dramatically. A connected car, for example, will generate 4TB of data/day, a connected plane, 40TB/Day and a connected factory 1 PB/Day (petabyte (PB) is 10¹⁵ bytes of data).

“Such an explosion of data, driven by our behavior as consumers and the emergence of new applications, will really challenge the infrastructure of the entire network as we know it today,” Salama said.

For example, all the sophisticated data analytics that are performed today at the data center need to be pushed downstream. This is particularly true for applications that will become very sensitive to data latency, for example, such as autonomous driving or connected hospitals.

“This is really shaping the future to be concentric around big data, and this is the main reason why data is being viewed today in the industry as the next disruptor and the engine for driving the semiconductor and the information and computing technology moving forward,” Salama said.

Etch Abatement Needed at 200mm Fabs to Meet WSC Goals for 2020

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I’m delighted to turn the blog over again to Mike Czerniak, Environmental Solutions Business Development Manager at Edwards. A longtime champion of the environment, Mike, nominated by the UK Department of Energy and Climate Change (DECC), was just been accepted as the ‘expert witness’ on CF4 for the forthcoming Intergovernmental Panel on Climate Change (IPCC) working party on emissions of this extremely long-lived gas (50,000 years).

Etch Abatement Needed at 200mm Fabs to Meet WSC Goals for 2020

By Mike Czerniak, Edwards

Mike Czerniak, Edwards

The World Semiconductor Council (WSC) is comprised of the semiconductor industry associations (SIAs) of the United States, Korea, Japan, Europe, China and Chinese Taipei. Its goal is to promote international cooperation in the semiconductor sector in order to facilitate the healthy growth of the industry from a long-term, global perspective. Formed in 1996, the WSC early on recognized the industry’s obligation to responsibly manage its impact on the environment.

One of the council’s first acts was the issuing of a voluntary industry target to reduce the emission of perfluorinated compounds (PFC) to 10 percent below their 1995 levels by 2010. PFCs are significant greenhouse gases (GHG) and many can persist for extended periods in the atmosphere. Given the significant growth of the semiconductor industry over this 15 year period, this was a very aggressive goal. By the end of the period, all member SIAs were able to report that they had met, and in many cases, significantly exceed the stated goal. This rather impressive achievement was accomplished by two key efforts. The first was the replacement of traditional CF4 and C2F6 CVD cleaning gases with NF3, which readily dissociates in a plasma to provide fluorine, an effective cleaning gas, which, though toxic, is not a greenhouse gas. The second was the widespread adoption exhaust gas abatement.

In 2011 the industry set new targets for 2020, which it summarizes as:

The implementation of best practices for new semiconductor fabs. The industry expects that the implementation of best practices will result in a normalized emission rate (NER) in 2020 of 0.22 kgCO2e/cm2, which is a 30 percent NER reduction from the 2010 aggregated baseline.

The addition of “Rest of World” fabs (fabs located outside the WSC regions that are operated by a company from a WSC association) in reporting of emissions and the implementation of best practices for new fabs.
NER based measurement in kilograms of carbon equivalents per area of silicon wafers processed (kgCO2e/cm2), which will be the single WSC goal at the global level.

The original 2010 target focused primarily (and successfully) on emissions from chemical vapour deposition (CVD) processes. The main area for potential improvement now, as illustrated by the figure below, is etch, especially in older 200mm fabs where etch processes may not have been fitted with PFC abatement devices. This is particularly true for etch processes making extensive use of CF4, which has a very high global warming potential over a 100-year timescale (GWP₁₀₀) of 7350, due largely to its atmospheric half-life of 50,000 years. It is extremely stable.

Figure 1. Global warming potential as carbon equivalent (in Kg) per year per 20,000 wafer starts per month. Etch processes are now the major opportunity to reduce harmful emissions in pursuit of WSC 2020 goals.

Some are predicting a prolonging of the productive lifetimes of 200mm fabs in conjunction with projected growth as a result of the growing market for internet of things (IoT). Many IoT devices do not require cutting-edge production technology and can be economically produced in older fabs. In any case, the onus is on our industry to continue our efforts to reduce any adverse effects on the environment we all share.

10 Reasons to Attend The ConFab this June

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The ConFab Conference and Networking Event will be held June 12-15. Presented by Solid State Technology, this executive-level event is designed exclusively for those driving growth and innovation in the semiconductor industry. With a theme the “New Age of Innovation for Semiconductors,” it features deep insights on the challenges and opportunities facing the industry and also offers powerful networking opportunities. Here are my top 10 reasons to register now.

The keynotes. Hear from Dr. Thomas Caulfield, senior vice president and general manager of the GlobalFoundries’ latest leading-edge 300mm semiconductor wafer manufacturing facility; Sunny Hui, senior vice president of worldwide marketing, Semiconductor Manufacturing International Corp., and Bill McClean, President of IC Insights.
Dynamic networking. A big part of The ConFab is the networking. There are plenty of opportunities to get together at breakfast, lunch and for evening receptions. The semiconductor industry has undergone unprecedented consolidation over the last year and the only way to know who’s who in the new landscape it to get out and talk to people.
Strategic business meetings. We arrange strategic meetings between technology suppliers and manufacturers, including IDMs, foundries and OSATs. Fabless companies, which are increasingly driving manufacturing decisions, are also involved.
The big picture. You’ll walk away with a high level overview of the myriad of challenges and opportunities now facing the semiconductor industry. In our first session, speakers will include Dan Armbrust, CEO and co-founder, Silicon Catalyst; Lode Lauwers, VP, Business Development, imec; Kevin Gibb, Editor for the Research Division at TechInsights; Hughes Metras, VP Strategic Partnerships N.A., CEA Leti; and Mark Reynolds, Senior Director Industry Development, New York Empire State Development.
Why new thinking is required for IoT innovation. The semiconductor industry needs to change the way it thinks about innovation, both technical innovation and business model innovation, especially when it comes to the Internet of Things (IoT). A panel session of experts and visionaries will discuss IoT’s role in various applications, how it will require investments in gateways, networks, servers and data analysis computers, and why IoT is the new big driver for semiconductor technology. Panelists include Uday Tennety, Director, Strategic Engagements and Innovation, GE Digital; Rajeev Rajan, Vice President of Product for Internet of Things, GlobalFoundries; Kelvin Low, Foundry Marketing, Samsung SSI; and Tim Hewitt, Director of Industry Solutions at Siemens. Come and ask questions!
Fab Management. Today’s fab managers face a long list of everyday concerns and long term challenges. They must continually be thinking of ways to improve operational efficiency, optimize asset utilization, boost tool and worker productivity (and safety), increase throughput, maximize yield and reduce defectivity. A session will focus on this issues, with a focus on real, hands-on solutions. Speakers will include: Sanchali Bhattacharjee, Technology Strategist: Component Supply Chain, Intel; Ardy Sidwha, Sr. Director, Innovation & Technology (R&D) at QuantumClean; Rick Glasmann, Senior Director and Managing Director FE Operations Temecula; and Mike Czerniak, product marketing manager at Edwards.
System Level Integration: New Directions in Packaging. System level package innovation and heterogeneous integration encompass a wide range of technologies, including module and 3D packaging, system-in-package (SiP), fanout, and embedded technologies. But questions remain. How will these technologies be utilized in advanced data centers & network systems, in future smart phones, and the growing medical, industrial and lifestyle IoT applications? A session, sponsored and organized by IEEE’s CPMT Society, will look at how packaging technologies are enabling innovative solutions that achieve system application requirements while maximizing system level performance, and, meeting cost, performance, form factor and reliability goals.
China. With the “Made in China 2025” initiative, China is aiming to improve the self-sufficiency rate for ICs in the nation to 40% in 2020, and boost the rate further to 70% in 2025. What will be key is how Chinese companies can gain access to 16/14nm, 10nm, and 7nm technologies as well as DRAM and 3D NAND technologies. China is also planning to be global leader in 5G, with test development in 2018 and initial broadband deployment in 2020. This session will examine how the China “wild card” and increased M&A activity designed to bring advanced technology into China is a true game-changer for the worldwide semiconductor industry. Following SMIC’s Sunny Hui’s keynote, presenters will include Ed Pausa from PricewaterhouseCoopers and Jimmy Goodrich, Vice President, Global Policy, Semiconductor Industry Association. Bill McClean will also discuss China in his talk.
Great location. The ConFab will take place at the beautiful Encore at The Wynn right in downtown Las Vegas.
Collaboration. It’s clear that the need for real collaboration has never been greater. At The ConFab, industry leaders will gather to tackle tough questions, take a look at the new post-consolidation landscape, network in a unique environment and collaborate on the future.

Register now by contacting Sally Bixby at [email protected]. Complimentary passes are available to qualified VIPs. You can also check out The ConFab website. I hope to see you there!

Does Consolidation Put Innovation at Risk?

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Consolidation in the semiconductor industry continues apace, with more than $100 billion in mergers and acquisitions announced in 2015, and more to come in 2016. “With our industry growth rates being so low, it’s a lot cheaper to acquire market share than it is to invest and beat your competitor over the head,” said analyst Bill McClean, speaking at SEMI’s Industry Strategy Symposium (ISS) in January.

One potentially negative impact of consolidation is reduced innovation, said Ivo J. Raaijmakers, Chief Technology Officer and Director of R&D at ASM International, speaking at ISS on consolidation in the equipment supplier market. “The tail has been cut off. A lot of innovation happens in this tail,” he said. “The question we have to ask ourselves is how can be ensure efficient innovation in such a consolidating landscape of equipment suppliers?”

The is compounded by exponentially increasing complexity and R&D spending. The diversity in the number of materials used is also increasing rapidly. This is important, since it most future innovations will require the use of these new materials.

“More and more innovations are needed per node, per year,” Raaijmakers said. “Life was easy in the ‘60s, ‘70s and ‘80s. In the ‘90s, there were silicides added. In the 2000s, there were tantalum oxides, spin-on glasses and copper and low k. In 2010, we had high k and metal gate. We had porous low k materials, new barriers, SOI coming in. in 2015, we saw a lot of materials used for patterning. In 2020, we will attack the channel material, going from silicon to germanium to III-V materials and all associated materials.”

Raaijmakers provided an equation that captures the mathematics of innovation:

dI/dt α I x η/τ

where I is the number of innovations being worked on: loosely relates to R&D budget

η is the average success rate: what fraction of projects are successful, and

τ is the time constant: how long does it take from innovation to production

Since R&D budgets are fixed at about 15% of the overall revenue, the only two knobs to turn are the success rate and affect the time constant. “We are in deep trouble,” he said, “unless we manage η and τ.”

Raaijmakers noted that industry consolidation lowers the number of innovation projects. At the same time, success rate decreases with complexity as does development time.

The time factor does not offer much potential. On average, most successful innovations take 7-10 years from concept to high volume manufacturing. “Can we decrease this by collaboration along the value chain?” Raaijmakers asked. “I think it will be difficult and if you can do it, it will not be a huge gain.”

On the other hand, there’s much to be gained by the other factor, which is increasing the efficiency. “Collaboration along innovation chain can significantly lower the risk of adoption. Are we all working on the right things to push through into manufacturing. How quick can you narrow down choices?” said Raaijmakers. He added the such collaboration may increase the speed, but that’s not the major effect.

Collaboration across the chain increases R&D leverage and improves efficiency. “That means that two parts in the supply chain are not doing competing things or different things. They are working on one solution which is the solution for the industry.”

He said successful companies will bring R&D much closer to the fab and high volume manufacturing, but while not forgetting R&D. “You have to be good at taking things into volume production and supporting it there. And you have to be good in R&D. Maintaining those two traits is not so easy, he said.

The First Degree – Ominous Threshold Reached

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In light of the Paris climate talks going on this week, I’m delighted to turn this blog over to a guest blogger, Mike Czerniak. Mike is the Environmental Solutions Business Development Manager at Edwards, and has been working in the semiconductor industry for more than 30 years. In 2014, he received SEMI’s Merit Award for his work on the Energy Saving Equipment Communication Task Force responsible for developing new standards designed to help reduce energy consumption in production equipment.

The First Degree – Ominous Threshold Reached as World Leaders Meet in Paris to Discuss Global Warming – Again

By Mike Czerniak, Environmental Solutions Business Development Manager, Edwards

The Met Office, the UK’s official office of meteorology, recently announced that, based on data acquired over the first 9 months of the year, 2015 is likely to be the first year in which the average global temperature exceeds by more than 1°Celcius (C), the average temperature for preindustrial years before we began to burn significant amounts of fossil fuels. Although the annual average temperature will fluctuate from year to year, the overall upward trend is well established and +1°C average temperatures are likely to become the norm. This is halfway to the 2°C threshold — at which most scientists agree damaging consequences are likely to occur, including the possibility of runaway warming in which no amount of reduction in industrial emissions would be able to reverse the trend. 2014 was the warmest year on record and 2015 looks to be even warmer. Reaching this ominous threshold should give new impetus to world leaders meeting this month (COP21) in Paris to attempt, once again, to reach an agreement on how best to address the issue of global warming.

It has been nearly 20 years since the signing of the Kyoto Protocol in which 192 countries committed to a real effort to reduce the industrial emission of greenhouse gases (GHG), which the protocol explicitly acknowledged as the cause of global warming. It was not until 2010 that the same group of nations recognized the 2°C threshold as the maximum acceptable increase in global temperature. The meeting in Copenhagen the previous year, where there was an attempt to force limits on individual countries, was largely a failure. At this year’s meeting in Paris the focus has shifted to securing voluntary reduction commitments from participants. Unfortunately, a UN analysis of commitments submitted prior to the meeting concluded that they would result in an unacceptable increase of 2.7°C. Still, there is room for optimism. The political climate has shifted significantly in favor of emission limits, particularly in the world’s two largest emitters, the US and China. Also, technological advances have significantly reduced the cost of renewable energy sources, such as solar and wind.

Our own industry, semiconductor manufacturing has shouldered its share of the responsibility. While we are not a major contributor to overall GHG emissions, we have made good progress in limiting our emissions of perfluorocarbon (PFC) gases, particularly powerful GHGs. In 1999, the World Semiconductor Council (WSC) agreed to reduce PFC emissions by at least 10% by the end of 2010. In actuality, we far surpassed this goal, achieving a reduction of 32% for the period. In 2011, the WSC announced a new voluntary PFC agreement for the next 10 years. The goals of the new program include an additional 30% reduction by 2020 in the normalized emission rate expressed as kilograms of carbon dioxide equivalent (CO2e) per square centimeter of processed silicon.

At Edwards, we are committed to playing a leadership role in the field of vacuum pumping and abatement by applying technology, products and services to benefit the environment for future generations. Over our products’ lifecycle we are in fact carbon equivalent negative. In a typical year our own operations, our supply chain’s and our customers’ operation of our equipment might generate 2 million tons of CO2e. In that same year, our abatement equipment will remove 6 million tons of CO2e. The net result is the removal of 4 million tons of CO2e from the environment. We strive constantly to reduce the energy intensity of our manufacturing operations and the energy consumption of our products. We have programs in place to reduce waste, both by eliminating landfill waste and by promoting the reuse of our products through service and remanufacture, and to reduce our own consumption of electricity by the increasing use of energy-efficient LED lighting in our facilities. And we seek every opportunity to reduce water usage.

We are extremely proud of our record of successful and conscientious environmental stewardship and it will continue to receive the highest priority at all levels of our organization.

Mike Czerniak, Edwards