Wafer Level Packaging

MAGAZINE



WAFER LEVEL PACKAGING ARTICLES



U.S. announces trade talks with Japan, the EU, and UK; Action will benefit semiconductor industry

10/22/2018  Last week, the Office of the U.S. Trade Representative (USTR), on instruction from President Trump, notified Congress that the administration intends to begin bilateral trade negotiations with Japan, the European Union (EU), and the United Kingdom.

China forecast to account for 90% of pure-play foundry market growth in 2018

09/26/2018  Driven by cryptocurrency device demand, TSMC's China sales are expected to surge by 79% this year.

Seven IC products to outpace total 16% IC market growth in 2018

09/18/2018  13 IC products forecast to show double-digit growth, led by a 39% surge in DRAM sales.

Amkor opens new semiconductor package manufacturing and test plant in Taiwan

09/12/2018  Amkor Technology announced on September 10th the opening of its new manufacturing and test plant at Longtan Science Park in Taiwan.

"Dreams Start Here" at SEMICON Japan 2018 in era of AI

09/11/2018  Japan is at the heart of the semiconductor industry as the era of artificial intelligence (AI) dawns. SEMICON Japan 2018 will highlight AI and SMART technologies in Japan's industry-leading event.

ASMC 2019 Call for Papers deadline is October 9, 2018

09/07/2018  Educate the industry about the latest in advanced processes and materials.

Industry's only worldwide OSAT manufacturing sites database now tracks 320 facilities

09/06/2018  SEMI and TechSearch International database also revises facility technology capabilities and offerings.

Standard for fan-out panel size ready to ballot

09/05/2018  The arrival of Fan-Out Panel Level Packaging (FO-PLP) appears to be at a perfect time: This technology will leverage processes developed for Three Dimensional Stacked Integrated Circuits (3DS-IC) as well as panel processing technologies developed for industries such as solar panels and large-screen TVs.

Brewer Science announces RDL-first fan-out packaging material

09/04/2018  Brewer Science, Inc. today from SEMICON Taiwan introduced the latest additions to its industry-leading BrewerBOND® family of temporary bonding materials, as well as the first product in its new BrewerBUILD™ line of thin spin-on packaging materials.

Micron Foundation establishes $1M fund for Virginia colleges and universities

08/30/2018  The Micron Foundation announced that it will commit $1 million to higher education institutions in Virginia as it invests in the next generation of technicians, scientists and engineers with a focus on women and underrepresented minorities in these fields.

Worldwide semiconductor revenue hit record $120.8B in Q2 2018

08/22/2018  Samsung Electronics, Intel and SK Hynix continued to lead the semiconductor market in Q2 2018.

MRSI Systems launches MRSI-HVM3P for new applications extending the MRSI-HVM3 die bonder family

08/21/2018  MRSI Systems (Mycronic Group), is expanding its high speed MRSI-HVM3 die bonder platform with the launch of the MRSI-HVM3P to offer configurations for active optical cable (AOC), gold-box packaging, and other applications in addition to chip-on-carrier (CoC).

SEMI integration of ESD Alliance underway

08/14/2018  SEMI today announced that all legal requirements have been met for the ESD (Electronic Systems Design) Alliance to become a SEMI Strategic Association Partner.

MORE WAFER-LEVEL-PACKAGING ARTICLES

TWITTER


WEBCASTS



Advanced Packaging

Date and time TBD

Back-end packaging is increasingly important to semiconductor device form factor, thermal and power performance, and costs. Compounded by the demand for lead-free processing and the soaring cost of gold, the industry is developing new approaches to packaging, including redistribution layers (RDL), through silicon vias (TSV), copper pillars, wafer-level packaging (WLP) and copper wire bonding. Experts will discuss these and other approaches in this webcast.

Sponsored By:

Lithography

Date and time TBD

EUV lithography has been under intense development for years and appears to be close to production. Yet its delay has the industry searching for alternatives, including double, triple and even quadruple patterning, directed self-assembly, multi-e-beam and nanoimprint. In this webcast, experts will detail various options, future scenarios and challenges that must still be overcome.

Sponsored By:

Environment, Safety & Health

Date and time TBD

The semiconductor industry is an acknowledged global leader in promoting environmental sustainability in the design, manufacture, and use of its products, as well as the health and safety of its operations and impacts on workers in semiconductor facilities (fabs). We will examine trends and concerns related to emissions, chemical use, energy consumption and worker safety and health.

Sponsored By:

More Webcasts

TECHNOLOGY PAPERS



Keysight's Parametric Measurement Handbook (Rev 4)

Keysight Technologies' popular 276-page Parametric Measurement Handbook is an invaluable reference tool for anyone performing device or process characterization. It is filled with tips to help both novice and advanced users, and the latest edition (Rev 4) includes an entirely new section devoted to power device test.September 13, 2018
Sponsored by Keysight Technologies

Jumpstart Your Reliability Verification with Foundry-Supported Rule Decks

For many, formal reliability verification is a new process. Foundry-qualified and foundry-maintained reliability rule decks enable design and IP companies alike to establish baseline robustness and reliability criteria without committing extensive time and resources to the creation and support of proprietary verification solutions. In addition, as reliability verification needs expand, customer demand drives the development and qualification of new and augmented reliability rules.August 30, 2018
Sponsored by Mentor Graphics

Maximize uptime and optimize maintenance with AMS

Yukinobu Hayashi, Senior Field Applications Engineer from CyberOptics, explains the application uses of the WaferSense® Auto Multi Sensor™ (AMS) for Leveling, Vibration, and Relative Humidity (RH) that facilitates maximizing uptime and optimizes maintenance. The combination of these attributes in a thin wafer shaped all-in-one wireless sensor, provides engineers the ability to acquire highly repeatable measurements of tilt, vibration, and humidity while under a vacuum and without venting a chamber. The quantitative numeric results give engineers an objective basis for comparisons, and analysis that can be reproducible across multiple users over extended periods of time. June 13, 2018
Sponsored by CyberOptics

More Technology Papers

EVENTS



Electronica
Munich, Germany
https://electronica.de/index.html
November 13, 2018 - November 16, 2018
EPTC 2018
Singapore
http://www.eptc-ieee.net/pages/home/2018
December 04, 2018 - December 07, 2018
Heterogeneous Integration Symposium
Milpitas, CA
http://www.meptec.org/2018Q4/
December 05, 2018 - December 05, 2018


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VIDEOS